eln5622 embedded systems class 2 spring 2003
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ELN5622 Embedded Systems Class 2 Spring, 2003. Kent Orthner [email protected] Resources. Course Page www.ksoa.ca/eln5644/index.html Other Resources www.hc11.demon.nl. Programming Model & Instruction Set Architecture. Instruction Set Architecture.

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resources

Resources

  • Course Page
    • www.ksoa.ca/eln5644/index.html
  • Other Resources
    • www.hc11.demon.nl
instruction set architecture

Instruction Set Architecture

  • The set of instructions that the microprocessor can execute.
  • Defines registers that a programmer can access
    • Some registers in the microprocessor are not directly accessible by the programmer
instruction set characteristics

Instruction Set Characteristics

  • Fixed vs. variable Length Instructions
    • 68HC11:
      • INX = 0x08
      • LDX #$C100 = 0xce c1 00
  • Addressing modes
    • R1  R2 + #$C100
    • R1  R3 + M(R3 + X)
  • Supported Operands
    • FMUL/FDIV, INC/DEC
multiple implementations

Multiple Implementations

  • Successful architectures have several implementations:
    • varying clock speeds;
    • different bus widths;
    • different cache sizes;
    • etc.
    • Ie: 8086 Architecture has not changed greatly through 8088, 80286, 80386, 80486, Pentium, etc …
pseudo code

Pseudo-code

  • Intended to illustrate algorithms.
  • Simple to understand
  • Assignments

AccA  #1234

AccB  M(#5678)

  • Functions

Putchar (char)

Newchar  getchar ()

pseudo code8

Pseudo-code

  • Conditionals
    • If () then
    • Elsif () then
    • Endif
  • Loops

While ()

Endwhile

Repeat

Until ()

programmer s model

Programmer’s Model

  • Describes the microprocessor registers that are accessible by the programmer
    • Includes information about the register width and the type of data element it may contain
    • Indicate how the instructions access and manipulate the registers
  • Some registers are not visible (IR).
registers

Registers

  • Local memory bits inside the processor.
  • Instructions use the registers to accomplish tasks.
  • Some are general purpose
    • R0 through R7
  • Some are function specific.
    • Program Counter
    • Stack Pointer
    • Condition Code
motorola 68hc11 programmers model12

Motorola 68HC11 Programmers Model

  • Accumulator:
    • 8-bit: A , B (ACCA, ACCB)
    • 16-bit: D (ACCD)
    • Two 8-bit accumulator registers. Each may be a source or destination operand for 8-bit instructions.
    • Some instructions use D as a single 16-bit accumulator, with A as the most significant Byte.
    • Examples:
      • ACCA  #$64
      • ACCB  ACCB + M($0074)
      • ACCD  ACCD + (M:M+1)
motorola 68hc11 programmers model13

Motorola 68HC11 Programmers Model

  • Index Registers:
    • X, Y (IX, IY)
    • Two 16-bit registers X & Y used primarily for indexed addressing.
    • Examples:
      • IX  #$0064
      • ACCD  M(IX+64):M(IX+65)
motorola 68hc11 programmers model14

Motorola 68HC11 Programmers Model

  • Stack Pointer:
    • SP
    • 16-bit registers pointing to the next available memory location for a push operation.
    • Automatically decremented during a push operation, incremented during a pull operation.
    • Must be initialized before use.
motorola 68hc11 programmers model15

Motorola 68HC11 Programmers Model

  • Program Counter:
    • PC
    • 16-bit register pointing to the beginning fot he next instruction to be executed.
    • Automatically incremented after each instruction.
    • Programmer has no control over, other than branch & jump instructions.
motorola 68hc11 programmers model16

Motorola 68HC11 Programmers Model

  • Condition Code Register:
    • CCR
    • 4-bit register whose bits are set or reset during arithmetic or other operations.
    • Used for branch operations.
    • Bits include:
      • C: Carry
      • V: Two’s complements overflow
      • Z : Zero
      • N : Negative
      • I : Interrupt Mask
      • H : Half-carry
      • X : External Interrupt Mask
      • S : Stop Disable
motorola 68hc11 programmers model17

Motorola 68HC11 Programmers Model

  • Condition Code Register Example

ACCA  $#F0

ACCA  ACCA + #$F0

11110000

11110000

11100000

C  1

Z  0

N  1

V  0

addressing modes

Addressing Modes

  • Immediate Addressing

ACCA  #$64

  • Direct / Extended Addressing
    • Direct: Addr <= 0xFF
    • Extended: Addr >= 0x0100

ADDA  M($0064) (Direct)

ADDA  M($1234) (Extended)

addressing modes19

Addressing Modes

  • Indexed Addressing

ACCA  M(IX + 64)

  • Inherent Addressing

ADDA  ACCA + ACCB

  • Relative Addressing

PC  (PC – 15)

motorola 68hc11 instruction types

Motorola 68HC11 Instruction Types

  • Load & Store Instructions
    • 8-bit Load/Store
    • 16-bit Load/Store
    • Stack Push/Pull
  • Transfer Register Instructions
  • Decrement & Increment Instructions
motorola 68hc11 instruction types21

Motorola 68HC11 Instruction Types

  • Clear & Set Instructions
    • CLRA, CLRB, BCLR, BSET
  • Shift & Rotate Instructions
    • Logical Shift
    • Arithmetic Shift
    • Rotate
motorola 68hc11 instruction types22

Motorola 68HC11 Instruction Types

  • Arithmetic Instructions
    • Add & Subtract
    • Decimal Instructions (BCD)
    • Negating Instructions
    • Multiplications
    • Fractional Number Arithmetic
    • Division
motorola 68hc11 instruction types23

Motorola 68HC11 Instruction Types

  • Logic Instructions
    • ANDA, ANDB, EORA, ORAA, COM
  • Data Test Instructions
    • BITA, BITB, CBA, CMPA, TST, TSTA
  • Conditional Branch Instructions
    • Signed & Unsigned Conditional Branches
    • BMI, BPL, BVS, GLT, BGT, BEQ, BNE
  • Unconditional Jump & Branch Instructions
    • JMP, JSR, BSR, RTS BRA, BRN
motorola 68hc11 instruction types24

Motorola 68HC11 Instruction Types

  • Condition Code Register Instructions
    • CLC, SEC, CLV, CEV, TAP, TPA
  • Interrupt Instructions
    • CLI, SEI, RTI, SWI, WAI
  • Miscellaneous Instructions
    • NOP, STOP, TEST
language spectrum

Language Spectrum

  • Machine Language
  • Assembly Language
  • Compiled Languages
    • C, C++, Pascal,
  • Interpreted Languages
    • Perl, TCL, UNIX shells
  • Higher level Languages
    • SQL, Etc
machine language

Machine Language

  • The lowest level of programming languages
  • Binary encodings of the machine’s instructions
  • Specific to the microprocessors
  • Programmers do not write machine language programs (anymore)
  • Machine language (or machine code) is automatically generated from the assembly or compilation processes
machine language example

Machine Language: Example

X  #$1234 (Immediate)

LDX #$1234

ce 12 34

X  $1234 (Direct)

LDX $1234

fe 12 34

assembly language

Assembly Language

  • One-to-one with Machine Language instructions (more or less)
  • More legible
  • Basic features:
    • One instruction per line.
    • Labels provide names for addresses (usually in first column).
    • Instructions often start in later columns.
    • Columns run to end of line.
assembly language30

Assembly Language

  • Assembly languages are unique to each microprocessor.
  • They are categorized at a much lower level than the High-Level Languages (HLLs)
  • May not be executed on other computer systems with different microprocessors (unless the microprocessors are designed to be compatible)
assembly language examples

Assembly Language Examples

  • Intel 8085, 8086, 80286,…80486
  • Intel Pentium
  • Motorola 6800, 6805, and 6809
  • Motorola 68000, 68020 & 68040
  • Motorola PowerPC
  • SUN Sparc processor
assembling process

Assembling Process

  • When a programmer writes a program in assembly language, a specific assembler must be used to create the object code for that specific microprocessor
  • The final executable file produced from this process can only be executed on a computer containing that specific type of microprocessor
assembling process33

Assembling Process

  • Major tasks:
    • generate binary for assembly instructions
    • translate labels into addresses
    • handle assembler directives
  • Generally one-to-one translation.
  • We are using a cross assembler:
    • Runs on a PC, but assembles for a 68HC11
  • The assembler we’re using is an absolute assembler:
    • All source code must be in one file or group of files assembled together.
compilation process

Compilation Process

  • Converts from a high level language to machine-executable machine language.
  • Output format is called “object code”.
    • Still needs to be linked before it can really be machine code.
  • Some compilers provide a post-compilation assembly file or list file for debugging.
data types

Data Types

  • Numeric Data
    • Integers
    • Fixed Point
    • Floating Point
  • Boolean Data
    • TRUE = 0
  • Character Data
    • American Standard Code for Information Interchange (ASCII)
    • Extended Binary Coded Decimal Interchange Code (EBCDIC)
    • UNICODE (Used extensively by Java)
assembly fields
Assembly Fields

*

* This is a Comment!

*

Label: OPCODE OP1,OP2 Comment

OPCODE OP1

OPCODE Another Comment

labels
Labels
  • A-Z a-z 0-9 . $ _
  • Up to 15 characters
  • 1st character can not be ‘0-9’ or ‘$’
  • Case sensitive
  • May end with “:”
  • May be on a line by itself.
  • Examples:

Test

_Test

JumpToHere: LDX #$1234

Label1

op codes
Op-Codes
  • Processor Instruction or
  • Assembler Directive (pseudo-op)
  • Must be preceded by at least one whitespace.

JumpToHere: LDX #$1234

JMP JumpToHere

operand field
Operand Field
  • Defines the operand for the instruction or directive.
  • Depends on the instructions.
  • Determines the addressing mode
  • Can be expressions to be evaluated by the assembler.

JumpToHere: LDX #$1234 + 5

JMP JumpToHere

operand field addressing modes
Operand Field: Addressing Modes
  • Inherent

INX

  • Direct, Extended, Relative

LDX $1234

  • Immediate

LDX #$1234

  • Indexed

CLR $1234,X

comments
Comments
  • Complete Line Comments: First chararcter is an asterisk.

*

* This is a Comment

* Kent Orthner, May 22, 2003

*

  • After the Operand

JumpHere: LDX #$1234 + 5

JMP JumpHere Also a Comment

hello world example
Hello World Example

* Hello World

* Kent Orthner, May 22, 2003

* Definitions

OUTSTR: EQU $FFCA Define ‘OUTSTR’ Function

EOT: EQU 04 Define ‘EndOfText’ Char

PROG: EQU $C000 Define Program Location

STACK: EQU $DFFF Define Stack Location

hello world example44
Hello World Example

* Program

ORG PROG Locate program in mem

lds #STACK Init stack pointer

ldx #HELLO Point to start of message

jsr OUTSTR Jump to print subroutine

swi Returns to the debugger

* String Definition

HELLO: FCC /Hello World!/

FCB EOT

assembler output machine language
Assembler Output:Machine Language

Addr Value

c000 8e df ff ce

c004 c0 0a bd ff

c008 ca 3f 48 65

c00c 6c 6c 6f 20

c010 57 6f 72 6c

c014 64 21 04

assembler output list files
Assembler Output: List Files

Line Addr Code Label Opcode

0001 * Hello World

0002 * Kent Orthner, May 22, 2003

0003

0004 * Definitions

0005 ffca OUTSTR: EQU $FFCA Define ‘OUTSTR’

0006 0004 EOT: EQU 04 Define ‘EndOfTex

0007 c000 PROG: EQU $C000 Define Program L

0008 dfff STACK: EQU $DFFF Define Stack Lo

assembler output list files47
Assembler Output: List Files

Line Addr Code Label Opcode

0009 * Program

0010 c000 ORG PROG Locate program

0011 c000 8e df ff lds #STACK Init stack po

0012 c003 ce c0 0a ldx #HELLO Point to start

0013 c006 bd ff ca jsr OUTSTR Jump to print

0014 c009 3f swi Returns to the

0015

0016 * String Definition

0017 c00a 48 65 6c HELLO: FCC /Hello World!/

6c 6f 20

57 6f 72

6c 64 21

0018 c016 04 FCB EOT

assembler directives50
Assembler Directives
  • ORG: Set the Program Counter

ORG $E000

  • EQU: Define Constants

RAM: EQU $E000

  • RMB: Reserve Memory Bytes

TABLE: RMB 100

assembler directives51
Assembler Directives
  • BSZ/ZMB: Block Storage Zeroes

ZeroSpace: BSZ 100

  • FCB: Form Constant Byte

CountSpace: FCB 1,2,3,4,5,6

  • FCC: Form Constant Character String

StringSpace: FCC ’Hello World!’

assembler directives52
Assembler Directives
  • FDB: Form Double Byte

FDB $1234

  • FILL: Fill Memory

AASpace: $aa,100

  • OPT: Assembler Output Options

OPT c,l,cre

lab 1 simple menu55
Lab 1: Simple Menu
  • Purpose:
    • Program assembly & execution.
    • Serial Input and Output.
    • Polling-based timing.
    • Parallel I/O
  • Assignment
    • Menu-based system.
    • Control something with the Parallel I/O block.
lab 1 simple menu56
Lab 1: Simple Menu
  • Criteria
    • Serial output to display menu.
    • Key entry causes menu change.
    • 2-Level menu
    • Pressing a key at the second level menu causes an external effect.
    • Idiot-proof (Doesn’t do anything when a wrong key is pressed.)
lab 1 simple menu57
Lab 1: Simple Menu
  • Criteria
    • Serial output to display menu.
    • Key entry causes menu change.
    • 2-Level menu
    • Pressing a key at the second level menu causes an external effect.
    • Idiot-proof (Doesn’t do anything when a wrong key is pressed.)
lab 1 simple menu implementation hints
Lab 1: Simple MenuImplementation Hints
  • Use Putchar(), Putstr(), getchar()
    • We’ll cover how to create them next week.
  • Suggested program flow:

Top: Print Menu

Wait for input

Go to SubMenu1, submenu2, or top.

Submenu1: Print submenu1

wait for input

Dosomething1, submenu1, or top.

Dosomething1: Do the action.

Go to Submenu1

Submenu2: …

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