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Computer Organization. Course Web Site http://www.engr.uconn.edu/~ibrahim/hardware. Textbooks. Computer Organization , 5th ed. Carl Hamacher, Zvonko Vranesic, Safwat Zaky. Processor. I/O. Computer Functional Units. Input. Arithmetic & Logic. Memory. Output. Control.

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Computer organization

Computer Organization

Course Web Site

http://www.engr.uconn.edu/~ibrahim/hardware

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Textbooks
Textbooks

  • Computer Organization, 5th ed.

    • Carl Hamacher, Zvonko Vranesic, SafwatZaky

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Computer functional units

Processor

I/O

Computer Functional Units

Input

Arithmetic& Logic

Memory

Output

Control

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Course organization
Course Organization

  • Computer Structure (Ch 1)

  • Instruction Sets & Addressing Modes (Ch 2)

  • Control Unit Design (Ch 7)

  • Computer Arithmetic (Ch 6)

  • Memory (Ch 5)

  • Input/Output (Ch 4)

  • Pipelining (Ch 8)

  • Embedded Systems (Ch 9)

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Computer information binary
Computer Information (Binary)

  • (Machine) Instructions

    • (Machine Language) Programs

  • Data

    • 2's complement

    • BCD

    • ASCII

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Output

Display

Printer

Speakers

Input

Keyboard

Mouse

Microphone

Camera

Scanner

I/O

  • Serial Communications

    • Network

    • Modem

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Memory

Primary

Random Access Memory (RAM)

Read Only Memory (ROM)

Organization

Word

Address

Read/Write

Secondary

Magnetic

Disks

Tape

Optical Disks

Hierarchy

Cache

Main

Virtual

Memory

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Arithmetic

Addition

Subtraction

Multiplication

Division

Comparison

Logic

AND

OR

NOT

XOR

ALU

  • Registers

    • Store

    • Shift

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Control unit
Control Unit

  • Coordinates/Directs other Units

  • Computer Operation

    • Input

      • Program/Data stored in Memory

    • Processing

      • Information fetched into Registers

      • Processed by ALU

    • Output

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History
History

  • First Generation (miliseconds)

    • von Neumann (stored program)

    • Vacuum Tubes

    • Magnetic Core Memory

    • Teletypes/Magnetic Tapes

  • Second Generation (microseconds)

    • Transistor

    • High-level Languages (Fortran)

      • Compilers

    • I/O Processors

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History1
History

  • Third Generation

    • Integrated Circuits

    • Microprogramming

    • Parallelism/Pipelining

    • Operating Systems (sharing)

    • Cache/VM

  • Fourth Generation (nanoseconds)

    • VLSI (Single Chip Microprocessor)

    • Personal Computers

    • Networks

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Computer functional units1

Processor

I/O

Computer Functional Units

Input

Arithmetic& Logic

Memory

Output

Control

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Control Unit

Arithmetic Logic Unit

MAR - Memory Address Register

MDR - Memory Data Register

PC - Program Counter

IR - Instruction Register

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Computer instructions

Assembly Language

MOVE NUM1,R1

MOVE #1,R2

ADD #1,R1

ADD R1,R2

Register Transfer Notation

R1  [NUM1]

R2  1

R1  1 + [R1]

R2  [R1] + [R2]

Computer Instructions

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The fetch execute cycle
The “fetch-execute cycle”

  • Fetch the instruction whose address is in the program counter

  • Increment the PC so it holds the address of the next instruction

  • Execute the instruction just fetched

  • Fetch the next instruction

  • Etc.

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Arithmetic/Logic Unit

Control Unit

Instruction Register

Data Register

instruction fetch

Program Counter

Data Register

instruction

Memory

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Instruction Fetch

CPU

PC

IR

Memory

MAR

MDR

Memory Control

instruction address

Bus

instruction

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Arithmetic/Logic Unit

Control Unit

instruction execute

Instruction Register

Data Register

Program Counter

Data Register

data

Memory

data

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Instruction Execution

CPU

IR

R1

Memory

MAR

MDR

Memory Control

operand (data) address

Bus

data

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Example instruction

Fetch

MAR  [PC]

PC  [PC] + 1

MDR  [MEM([MAR])]

IR  [MDR]

Execute

MAR  NUM1

MDR  [MEM([MAR])]

R1  [MDR]

Example Instruction

MOVE NUM1,R1

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Another example

Fetch

MAR  [PC]

PC  [PC] + 1

MDR  [MEM([MAR])]

IR  [MDR]

Execute

R1  1 + [R1]

Another Example

ADD #1,R1

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Single bus structure
Single-Bus Structure

Input

Output

Memory

Processor

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System software
System Software

  • Compiler

    • High-level Language  Machine Language

  • Assembler

    • Assembly Language  Machine Language

  • Text Editor

    • Keyboard Input  File

  • Operating System

    • Control Sharing & Interaction

    • Assign & Manage Resources

      • Memory

      • Disk Space

    • Handle I/O

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Memory performance
Memory Performance

Main

Memory

Processor

Cache

Memory

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Processor clock

Period (P)

Rate (R)

R = 1/P

1 GHz = 1/1ns

Processor Clock

CLK

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Performance equation
Performance Equation

  • Processor Execution Time (T)

  • Number of Machine Language Instructions (N)

  • Average Steps per Machine Instruction (S)

  • Clock Rate (R)

  • MIPS: Millions of instructions per second

  • Megaflops: Millions of floating point operations per second

  • Megahertz: Millions of clock cycles per second

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Pipelining

I1

I2

I3

F1

E1

F2

E2

F3

E3

Sequential Execution

I1

F1

E1

I2

F2

E2

I3

F3

E3

Pipelined Execution

Pipelining

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Parallel processing
Parallel Processing

  • Parallel Execution

    • Superscalar

  • Multiprocessors

    • Shared-Memory

  • Multicomputers

    • Message-Passing

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Multiprogramming

Multiprocessing, multitasking.

A system that provides for concurrent execution

of multiple programs, i.e., manages multiple processes

Programs share use of the processor (take turns).

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Multiprogramming

Multiprocessing:

1) Multiprogramming

2) Parallel processing (multiple processors)

depending on context

Multitasking:

  • 1) Multiprogramming

  • 2) A particular form of multiprogramming

depending on context

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Printer

Disk

OS

routines

Program

t

t

t

t

t

t

1

2

3

4

5

0

Time

Figure 1.4. User program and OS routine sharing of the processor.

Figure 1.4. User program and OS routine sharing of the processor.

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Cisc vs risc
CISC vs RISC

  • Complex Instruction Set Computers (CISC)

    • Smaller N

    • Larger S

  • Reduced Instruction Set Computers (RISC)

    • Larger N

    • Smaller S

    • Easier to Pipeline

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