JTAG, Multi-ICE and Angel

1. JTAG, Multi-ICE and Angel Speaker :沈文中 National Taiwan University Adopted from National Taiwan University SOC Course Material

2. Outline • ARM debug Architecture • Content of JTAG • Content of Embedded ICE • Multi-ICE Arch. • Angel Arch.

3. ARM debug Arch.(I) • AXD can debug design through: • ARMulator(software) • Multi-ICE(hardware) • Angel(hardware)

4. ARM debug Arch.(II) • Limits of ARMulator • Processor core model • Memory interface • Coprocessor interface • Operating system interface

5. ARM debug Arch.(III) • Multi-ICE • The solution for ARMulator limits • Can emulate custom logic • Use hardware to emulate truly results • Extended from JTAG Architecture

6. ARM debug Arch.(IV) • Angel • A hardware can be real-Monitor interface • Angel communicates using ADP • Allow multiple indep. sets of messages to share a communications link

7. Outline • ARM debug Architecture • Content of JTAG • Content of Embedded ICE • Multi-ICE Arch. • Angel Arch.

8. JTAG Arch. • Serial scan path from one cell to another • Controlled by TAP controller

9. JTAG principle(I)

10. JTAG Principle(II) • JTAG Signals • TRST Test reset signal • TDI Test data in • TMS Test mode select • TCK Test clock • TDO Test data out

11. EmbeddedICE interface

12. Outline • ARM debug Architecture • Content of JTAG • Content of Embedded ICE • Multi-ICE Arch. • Angel Arch.

13. Debug extensions to the ARM core • The extensions consist of a number of scan chains around the processor core and some additional signals that are used to control the behavior of the core for debug purposes : • BREAKPT: enables external hardware to halt processor execution for debug purposes.active high • DBGRQ: is a level-sensitive input that causes the CPU to enter debug state when the current instruction has completed. • DBGACK: is an output from the CPU that goes high when the core is in debug state

14. The EmbeddedICE logic • This logic is the integrated onchip logic that provides JTAG debug support for ARM core. • This logic is accessed through the TAP controller on the ARM core using the JTAG interface. Consists of: • Two watchpoint units • A control register • A status register • A set of registers implementing the Debug Communications Channel link

15. Watch /break point • Watchpoints are taken when the data being watchpointed has changed. • Breakpoints are taken when the instruction being breakpointed reaches the execution stage. the program counter is not updated, and retains the address of the breakpointed instruction.

16. Outline • ARM debug Architecture • Content of JTAG • Content of Embedded ICE • Multi-ICE Arch. • Angel Arch.

17. Multi-ICE(I)

18. Multi-ICE(II) • Debugging software can be run on different computer through Network.

19. The portmap application • To support network connections, an additional application must be running on the windows workstation that runs the The multi-ICE server. • the portmapper allows software on other computers on the network to locate the The multi-ICE server.

20. How multi-ICE differs from a debug monitor • A debug monitor is an application that runs on your target hardware in conjunction with your application, and requires some resources(ex:memory) to be avaible • The EmbeddedICE debug arch. Requires almost no resources. Rather than being an application on the board, it works by using : • Additional debug hardware within the core, parts that enable the host to communicate with the target • An external interface unit that buffers and translates the core signals into something usable by a host computer

21. Outline • ARM debug Architecture • Content of JTAG • Content of Embedded ICE • Multi-ICE Arch • Angel Arch.

22. Angel (I) • Angel system • Debugger: Running on the host computer, giving instructions to Angel and displaying the results obtained from it. • Angel debug monitor: Running alongside the application being debugged on the target platform. • Armsd: The command line must be of the form: armsd –adp –port s=1 –linespeed 38400 image.axf

23. Angel (II) • Debug support • Reporting and modifying memory and processor status • Downloading applications to the target system • Setting breakpoints • C library semihosting support • Enabling applications linked the ARM C and C++ libraries to make semihosting requests by SWI • Communications support • Using ADP for communicates • Providing an error-correcting communications protocol.

24. Angel (III) • Angel’s communications diagram

25. Angel (IV) • Task management • Ensuring that only a single operation is carried out at any time • Assigning task priorities and schedules tasks accordingly • Controlling the Angel environment processor mode

26. Angel(V)

27. Goal Set up the hardware and the software of Multi-ICE unit and target board.Use Multi-ICE to debug. Principles Basic debug skill Debugger-Target Interface Guidance Overview of examples used in the Steps Steps Multi-ICE connects the parallel port of a workstation to the JTAG interfaces of an ASIC Angel debug monitor uses a serial line or Ethernet to communicate with a development host running an ARM debugger. Requirements and Exercises Write a lotto program that generates N sets of number. The user can specify: Number of the set: N. The numbers must be included in these N sets of number The numbers must not be included in these N sets of number Discussion What’s different between with ARMulator and MultiICE or ARMulator and Angel that we do the debugging task. Lab 6: JTAG and Multi-ICE

28. Multi-ICE [DUI_0048F_MICE2_2_UG] AXD and armsd Debuggers Guide [DUI_0066D_AXDDG_2_UG ] Getting Started Guide [DUI_0064D_GSG_UG ] AFS_Referece_Guide Reference Topic & Related Documents