68HC11 Programming Model & Addressing Modes

68HC11 Programming Model & Addressing Modes • Notes: Tests will be returned in your studios. Grades will be up by tonight. • Today: • First Hour: HC11 Programming model • Section 1.1-1.5 of Huang’s Textbook • In-class Activity #1 • Second Hour: Addressing Modes • Section 1.6-1.7 of Huang’s Textbook • In-class Activity #2

Address Bus Result Bus Memory A Memory Address M M I A P Data Bus Bus A B R C C R R B Memory Bus Recap: Toy CPU What does a chip designer need to know build the computer? Hardware Model Architecture, hardware timing specs, electrical specs, wiring specs, power specs...

“Program” is the sequence of instructions which serves as input to the control FSM of the computer. “Machine instruction” is a sequence of binary digits which can be executed by the processor “Assembly language” : assembly instructions An assembly instruction is a mnemonic representation of a machine instruction Assembly programs must be translated before it can be executed: translated by an assembler “High-level language”: syntax similar to English A translator is required to translate the program written in a high-level language to machine language: compiler Programming

Toy Programmer’s View List of Instructions AC (16 bits) Memory (16 bits wide, 14-bit address) PC (14 bits) What does a programmerneed to know to program the computer? Programming Model 1.Memory Model 2.Registers 3.Instruction Set Registers such as MAR and MBR are “invisible” to the programmer

Mnemonic Operation Op-code LOAD mem<qhhh> -> AC 00 STORE AC -> mem<qhhh> 01 ADD AC + mem<qhhh> -> AC 10 BRN IF AC<15> =1 THEN qhhh -> PC 11 16-bit Accumulator 15 AC 0 13 PC 0 14-bit Program Counter Toy Instructions Registers What registers do we need?

OP OPERAND Programming Model Instruction Format 16-bit Instruction How many bits are needed for the OpCode? 2 How many bits are needed to access any memory location? 14 2-bit OpCode 14-bit Operand

Mnemonic Operation Op-code LOAD mem<qhhh> -> AC 00 STORE AC -> mem<qhhh> 01 ADD AC + mem<qhhh> -> AC 10 BRN IF AC<15> =1 THEN qhhh -> PC 11 Address Bus Memory Address M I P Bus A R C R Toy Programming Model Instruction Set What bus do we take?

A “single-chip 8-bit micro-controller” Intended to control appliances 8-bit data bus 16-bit address bus Integrates many items on one chip: Clock CPU RAM ROM Ports for External Input/Output Several built-in Input/Output devices like timers, serial and parallel communication Introducing the M6811

HANDSHAKE I/O DATA DIRECTION C PARALLEL I/O PORT B PORT C P P P P P P P P P P P P P P P P S S SINGLE B B B B B B B B C C C C C C C C T T CHIP 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 R R B A A A A A A 1 1 1 1 1 5 3 2 4 M6811 Hardware Model PA7 PAI ROM-8KB PULSE ACCUMULATOR OC2 O PA6 C OC3 PA5 1 PORT PA4 OC4 RAM-256 bytes OC5 A PA3 IC1 PA2 PERIODIC INTERRUPT PA1 IC2 EEPROM-512 bytes COP WATCHDOG IC3 PA0 PE7 PD5 SS SCK PD4 PE6 SPI PE5 MOSI PD3 PORT PE4 PD2 MISO PORT DATA DIRECTION A/D E PE3 D CONVERTER PE2 PD1 TxD SCI PE1 RxD PD0 PE0 V REFH M68HC11 CPU V REFL ADDRESS DATA BUS RESET INTERRUPTS XIRQ IRQ (V ) PPBULK XTAL OSCILLATOR EXTAL E MODA MODE LIR SELECT MODB (V ) STBY A A A A A A A A A A A AS 1 9 8 D D D D D D D D R/W V EXPAND DD 1 0 7 6 5 4 3 2 1 0 POWER V SS

M6811 ALU Bus #1 Register File (A, B, IX, IY, IR) Memory A FLAGS Memory Address M P M Data Bus Bus A C B R R B MUX Bus #2

Memory = 64K x 8 15 PC 0 $0000 16-bit Program Counter $hhhh 7 mem 0 $FFFF 7 ACCx 0 8-bit Accumulator M6811 Memory Model Number Notation $denotes hexadecimal h= 0000 .. 1111

- - H - NZVC Condition Code Register M6811 Registers 8-bit Accumulators A & B 7 A 0 7 B 0 16-bit Accumulator D 15 D 0 16-bit Index Register IX 15 IX 0 16-bit Index Register IY 15 IY 0 15 PC 0 Program Counter Carry/borrow (MSB) oVerflow (2s C) Zero Negative Half carry (bit 34),(BCD)

LDAA (opr) : opr = data in memory The Load Accumulator A instruction copies the contents of the addressed memory register into the accumulator This means the contents of memory (M) replaces the contents of accumulator A (A) denoted by (M)  (A) Motorola short-hand notation: M  A M6811 Instruction Notation See PRG entry for “LDAA”

$C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 Transfer content of M($C210) to Accumulator A LDAA Instruction Format OPCODE Address-High Byte Address-Low Byte Sample Instruction LDAA The instruction directly specifies the address

Memory Segment M6811 Registers $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 C1 20 PC LDAA IR A 23 B 45 Example: LDAA PC holds address of next instruction A & B contain values from previous write operations

M6811 Registers Memory Segment C1 20 PC $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 LDAA IR A 23 B 45 1. Fetch Opcode LDAA Example Increment PC 21 B6

M6811 Registers Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 C1 21 PC LDAA B6 IR A 23 B 45 2. Decode Opcode LDAA Example Decode opcode How many operand bytes? (Use PRG) 2

M6811 Registers Memory Segment C1 PC 21 $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 LDAA B6 IR A 23 B 45 3. Operand Fetch LDAA Example Increment PC Increment PC 22 23 10 C2 Fetch two operand bytes

M6811 Registers Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 C1 23 PC LDAA B6 C2 10 IR A 23 B 45 4. Instruction Execution LDAA Example 12 Get data from memory

Do Activity #1 Now It is really, really important to bring the Huang textbook, and the 6811 manual To each and every class

HC11 Sample Instructions The LOAD instructions A group of instructions that place a value or copy the contents of a memorylocation (or locations) into a register LDAA <opr> LDAB <opr> LDD <opr> LDX <opr> LDY <opr> LDS <opr> <opr> can be immediate, direct, extended, or index mode Examples LDAA $10 LDX #$1000

The ADD instruction A group of instructions perform addition operation ABA ABX ABY ADDA <opr> ADDB <opr> ADDD <opr> ADCA <opr> ADCB <opr> <opr> is specified using an addressing mode Examples. ADDA #10 ADDA $20 ADDD $30

The SUB instruction A group of instructions that perform the subtract operation SBA SUBA <opr> SUBB <opr> SUBD <opr> SBCA <opr> ; A  [A] - <opr> - C flag SBCB <opr> ; A  [B] - <opr> - C flag <opr> can be one of selected addressing modes Examples SUBA #10 SUBA $10 SUBA 0,X SUBD 10,X

The STORE instruction A group of instructions that store the contents of a register into a memory location or memory locations STAA <addr> STAB <addr> STD <addr> STX <addr> STY <addr> STS <addr> <addr> can be one of selected mode Examples: STAA $20 STAA 10,X STD $10 STD $1000 STD 0,X

$C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 Transfer content of M($C210) to Accumulator A LDAA Instruction Format OPCODE Address-High Byte Address-Low Byte Sample Instruction How did we specify the operand? The instruction directly specifies the address This is not the only way to the job

Addressing Mode for Operand Machine Code Source Form Boolean Expression Operation Bytes Opcode Operand LDAA Load Accumulator A M  A IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 Each way is called an Addressing Mode Addressing Modes 5 different ways to specify the operand! They have different OpCodes How do we tell these addressing modes apart?

Addressing Mode for Operand Machine Code Source Form Boolean Expression Operation Bytes Opcode Operand LDAA Load Accumulator A M  A IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 Address Mode Examples IMM (immediate) 86 28 : LDAA #$28 Load ACCA with the "immediate" constant $28 How much of the address space can we "reach" with DIR? 256 Bytes What is this mode good for? Saves Bytes & Fetches DIR (direct) 96 28 : LDAA $28 Load ACCA with the content of memory address $0028

Addressing Mode for Operand Machine Code Source Form Boolean Expression Operation Bytes Opcode Operand LDAA Load Accumulator A M  A IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 Address Mode Examples-2 EXT (extended) B6 C128 : LDAA $C128 Load ACCA with the content of memory address $C128 How much of the address space can we "reach" with EXT? 65536 Bytes What is this mode good for? Reaches all memory

Addressing Mode for Operand Machine Code Source Form Boolean Expression Operation Bytes Opcode Operand LDAA Load Accumulator A M  A IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 Address Mode Examples-3 IND,X (indexed,X) A6 28: LDAA $28,X Load ACCA with the content of memory address (EA), where EA = IX + $28 IX is called an Index Register It holds a 16-bit base address The operand is an unsigned offset byte EA = Base + Offset There’s another index register, IY How much of the address space can we "reach" with IND,X? 256 Bytes What is this mode good for? Addressing elements in an array

What’s the big idea? All of the addressing modes were developed in response to specific needs Need Addressing Mode Reach the first 256 RAM Direct locations quickly Load a constant without having Immediate to first put it in memory Access arrays of numbers Indexed efficiently, implement pointers We’ll do array and pointer examples later...

OP CODE Immediate OP CODE 16-bit data DATA-High DATA DATA-Low OP CODE 00 Address-Low Direct Address-Low Extended OP CODE Address-High Address-Low Address-High Address-Low Effective Address OP CODE Indexed Address-High Address-Low Offset Index Register Address Mode Summary

Do Activity #2 Now • Due: End of Class Today. • RETAIN THE LAST PAGE(S) (#3 onwards)!! • For Next Class: • Bring Huang Textbook, & HC11 PRG • Required Reading: • Sec 2.1-2.4, 2.8 of Huang • This reading is necessary for getting points in the Studio Activity!

68HC11 Programming Model & Addressing Modes