Chapter 3 materials and basic processes
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Chapter 3 Materials and Basic Processes. Picture of the chip set of SensoNor’s SP13 Tire Pressure Sensor. The course material was developed in INSIGTH II, a project sponsored by the Leonardo da Vinci program of the European Union. Materials: Metals.

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Chapter 3 Materials and Basic Processes

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Chapter 3 materials and basic processes

Chapter 3Materials and Basic Processes

Picture of the chip set of SensoNor’s SP13 Tire Pressure Sensor

The course material was developed in INSIGTH II, a project sponsored by the Leonardo da Vinci program of the European Union

Electronic Pack….. Chapter 3 Materials and Basic Processes


Materials metals

Materials: Metals

  • Right choice, right use and compatibility of materials is the key to good packaging and optimal properties.

    • Elemental metals:

      • High electrical conductivity

      • High thermal conductivity

      • Higher thermal coefficient of expansion (TCE) than semiconductors and most ceramics

    • Alloys: taylored to many uses:

      • Poorer electrical and thermal conductivity than elements

      • Taylored TCE

      • Lower melting point

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Metals continued

Metals, continued

  • (Table 3.1)

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Metal alloys

Metal Alloys

  • Alloys have poorer conductivity, both electrical and thermal.

  • Fig. 3.1: Phase diagram for Sn/Pb. The eutectic mixture 63%/37% has a melting point of 183°C.

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Insulators

Insulators

  • (Fig 3.1b)

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Semiconductors si and gaas

Semiconductors, Si and GaAs

  • High thermal conductivity

  • Electrical conductivity spans many orders of magnitude, depending on doping

  • Very low TCE

  • "Machinable" by anisotropic etching (Si)

  • Excellent protective oxide (Si)

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Ceramics

Ceramics

  • Inorganic, non-metallic

  • Made by powder, compressing or tape casting, and high temperature treatment (600-1800oC)

  • Chemically and thermally very stable

  • Electrical insulators

  • Some ceramics are very good thermal conductors

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Ceramics continued

Ceramics, continued

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Ceramics continued1

Ceramics, continued

  • Dielectric loss:

    • tan d = (1/R)/wC = 1/Q

    • e = eo(k´ - jk")

    • tan d = k"/k´.

  • Main uses:

    • Substrates for hybrid circuits, component packages, SMD resistors

    • Multilayer capacitors

    • Future: Superconductors ?

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Materials

Materials

  • Fig 3.1.d

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Ceramics continued2

Ceramics, continued

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Ceramics continued3

Ceramics, continued

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Glasses

Glasses:

  • Glasses are amorphous, supercooled liquids

    • Uses:

      • Matrix for thick film pastes

      • Hermetic seals

      • Substrates, together with ceramics

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Plastics

Plastics

  • Organic, synthetic polymer materials with numerous uses in electronics

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Plastics continued

Plastics, continued

  • Composition, properties:

    • Monomers derived from benzene

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Plastics continued1

Plastics, continued

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Plastics continued2

Plastics, continued

  • Requirements:

    • High electrical resistivity, high breakdown field, low dielectric losses, low dielectric constant

    • Thermal and mechanical stability

    • Thermal expansion compatible with Si and metals

    • High mechanical strength/softness and flexibility

    • Chemical resistance

    • Good adhesion to other materials

    • Ease of processing

    • Low water absorption, small changes of the properties during the effect of moisture.

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Plastics continued3

Plastics, continued

  • Composition, properties:

    • Linear, branched or crosslinked

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Plastics continued4

Plastics, continued

  • Thermoplastic or thermosetting

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Plastics continued5

Plastics, continued

  • Polymerization: A-, B-, C-stages.

  • High electrical resistivity , low dielectric constant r, low loss factor tan , high breakdown field Ecrit

  • Poor thermal conductors

  • Visco-elastic

  • Fig 3.7: The structural unit of certain monomers/polymers.

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Plastics continued6

Plastics, continued

  • "Glass transition": change from glass-like to rubber - like

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Plastic materials

Plastic Materials:

  • Epoxy

  • Phenolic

  • Polyimide

  • Teflon

  • Polyester

  • Silicone

  • Polyurethane

  • Parylene

  • Acrylic

  • Polysulphone, polyethersulphone, polyetherimide

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Plastics continued7

Plastics, continued

  • Fig. 3.9:a):The epoxide group, which is the building block in epoxy, b) - e): Starting materials for epoxy:b): Bisphenol A, which constitutes most of the starting material. The H-atoms in the places X are often replaced with Br to reduce the flammability; c): Epoxy novolac; d): The hardener dicyandiamide; e): The catalyst.

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Plastics continued8

Plastics, continued

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Basic processes

Basic Processes

  • Description of some of the basic processes used in microelectronics, microsystems and electronic packaging.

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Photolithography

Photolithography

  • Fig. 3.10:The steps in photolithographic transfer of patterns and the subsequent etching of metal films with negative photoresist.

  • If positive resist is used, it is the illuminated part of the photoresist, which is removed during the development.

  • Positive resist most used today because of better accuracy

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Photolithography cont

Photolithography, cont

  • Also, please observe the concept of straight polarity masks and reverse polarity masks:

    • Straight polarity:In layers with straight polarity, a positive image of the layout will be transferred onto the process layer. In other words, draw the objects that need to be covered with photo-resist after development.

      • Openings: Mask pattern is repeated on the substrate for additive films etc., like metal patterns. (Assuming positive resist is used)

    • Reverse polarity:In layers with reverse polarity, draw the areas where photo-resist should be removed. The actual mask will be the negative image of the layout.

      • Mask pattern is oppositely repeated on the substrate for additive films etc., like openings in oxide for later difussion of dopants. (Assuming positive resist is used)

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Screen printing and stencil printing

Screen Printing and Stencil Printing

  • Fig. 3.11: Screen printing: a) and b): Printing process, c) and d): Details of the screen

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Etching

Etching

  • Wet, chemical etching

  • "Dry" plasma- or reactive ion etching

  • Examples, wet etching:Copper:FeCl3 + Cu -> FeCl2 + CuClIn addition:FeCl3 + CuCl -> FeCl2 + CuCl2Need organic etch resist, not good with PbSn.Gold:KI + I2 -> KI3 + KI (surplus)3 KI3 + 2 Au -> 2 KAuI4 + KI

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Plating

Plating

  • Electrolytic plating:

    • Electric current of ions in electrolyte. External circuit needed. All separate parts of area to be plated must be electrically contacted to external circuit.Example: Cu in CuSO4 /H2SO4Reaction at anode (Cu supply):Cu -> Cu2+ + 2e-Reaction at catode (substrate):Cu2+ + 2e- -> Cu

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Plating continued

Plating, continued

  • Chemical plating:

    • Takes place without external current

    • Needed when insulating surfacec are to be plated

    • Often preceeds electrolytic plating, to make all needed areas electrically conductive

    • Complex processes of "sensitizing", "activation" and plating

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Vacuum deposition and sputtering

Vacuum Deposition and Sputtering

  • Vacuum evaporation:

    • Chamber evacuated toless than 10-6 Torr

    • Resistance heating

    • Metal evaporation

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Other methods for deposition of conducting or insulating films

Other Methods for Deposition of Conducting or Insulating Films

  • DC Sputtering (Fig. 3.13.a)

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Deposition continued

Deposition, continued

  • Radio Frequency AC Sputtering (Fig.3.13.b)

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Methods for electrical and mechanical contact

Methods for Electrical and Mechanical Contact

  • Soldering

    • Wetting: (Fig. 3.14)Young´s eq.:gls + gl cos Q = gs

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Leadless soldering

Leadless soldering

  • Leadless soldering replacing lead-based solder due health hazards and environmental issues


Soldering continued

Soldering, continued

  • Most common solder alloy: 63 % Sn / 37 % Pb (eutectic)Melting point 183 oC

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Soldering continued1

Soldering, continued

  • Fatigue: Coffin-Mansons formula:N0.5 x gp = constantwhere N is number of stress cycles, and gp is the relative deformation amplitude, meaning that both number of cycles and stress level determine lifetime

  • Useful adition : 2 % Ag (Surface mount), to reduce leaching (dissolution of the termination metal that leads to deterioration of mechanical and electrical properties)

  • Harmful contaminant: Au, will increase brittleness because of AuSn intermetallics

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Soldering continued2

Soldering, continued

  • Fig.3.15:Behaviour of solder metal at different temperatures, schematically. [W. Engelmaier].

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Soldering continued3

Soldering, continued

  • Fig. 3.16: Solder joint fatigue in surface mounted assemblies is often caused by power cycling.

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Soldering continued4

Soldering, continued

  • Fig. 3.17: Experimental data for fatigue in Sn/Pb solder fillet by cyclical mechanical stress. High temperature and low cycling frequency gives the fastest failure, because the grain structure relaxes most and is damaged

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Soldering continued5

Soldering, continued

  • Fig. 3.18. a) Left: Dissolution rate of Ag in solder metal, and in solder metal with 2 % Ag, as function of temperatureb) Right: Dissolution rate of various metals in solder alloy

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Soldering continued6

Soldering, continued

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Soldering continued7

Soldering, continued

  • Flux and cleaning

    • Purpose of flux:

      • Dissolve and remove oxides etc.

      • Protect surface

      • Improve wetting

    • Categories:

      • Soluble in organic liquids

      • Water soluble

    • Types:

      • Organic resin fluxes ("rosin")

      • Organic non resin based fluxes

      • Inorganic fluxes

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Soldering flux and cleaning

Soldering: Flux and cleaning

  • Fig. 3.19: Time for solder alloy to wet a pure Cu surface, depending on the activation of the solder flux. The degree of activation is given by the concentration of Cl- ions in the flux (temperature: 230 °C)

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Soldering flux and cleaning1

Soldering: Flux and Cleaning

  • Designations:

    • R (Rosin, non-activated): No clorine added.

    • RMA (Rosin mildly activated): < 0.5 % Cl

    • RA (Rosin, activated): > 0.5 % Cl

  • Cleaning

    • Freon (TCTFE) now forbidden. Replaced by alcohol etc.

    • Trend: No cleaning

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Gluing

Gluing

  • Purposes:

    • Mechanical assembly

    • Electrical contact

    • Thermal contact

  • Materials: polymers:

    • Epoxy, acrylic, phenolic, polyimide

    • Metal particles for electrical conductivity:r = 1 - 10 x 10 -6 ohm m

    • Metal or ceramic particles for thermal conductivity:K ≈ 1 - 3 W /m x oC

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Gluing continued

Gluing, continued

  • Fig. 3.20: Thermal conductivity of epoxy adhesive with various amounts of Ag [3.16 a)]. The concentration is in volume % Ag. (23 vol. % corresponds to approximately 80 weight %).

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Gluing continued1

Gluing, continued

  • Fig. 3.21: The thermal resistance from the electronically active part, on top of the Si chip (¨junction¨) through a bonding layer of glue or soft solder and a thin alumina ceramic layer covered with Cu to heat sink. The samples with chips bonded by gluing, C and A, have approximately twice as high total thermal resistance as those which are soft soldered, D and B.

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Chip mounting die bonding

Chip Mounting: Die Bonding

  • Fig. 3.22: Thermal resistance from junction to heat sink through adhesive of various thicknesses. For thick layers the resistance approaches the value calculated, based on the bulk thermal conductivity of the adhesive. For thin layers the resistance is higher, approaching a constant value, which indicates an "interface thermal resistance" caused by defects in the adhesive layer

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Chip mounting die bonding continued

Chip Mounting: Die Bonding, continued

  • Eutectic die bonding:

    • Au/Si (363 oC), Au/Sn (280 oC)

  • Soft soldering: Sn/Pb, Ag/Pb

  • Glueing

  • Adhesive cracking, fig. 3.23: Thermal cycling induces defects giving increased thermal resistance.

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Chip mounting die bonding continued1

Chip Mounting: Die Bonding, continued

  • Fig. 3.24: Use of adhesive for contacting IC-chips with small pitch, schematically:a): Anisotropic conductive adhesive, the conduction is through the metal particles in the adhesive; b): Electrically insulating adhesive, the conduction is through point contacts where the adhesive has been squeezed out.

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Si chip electrical contact

Si Chip Electrical Contact

  • Wire bonding

  • Tape Automated Bonding (TAB)

  • Flip chip

  • Planar bonding

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Wire bonding

Wire Bonding

  • Ultrasonic

  • Thermo-compression

  • Thermosonic

  • Geometry Types

    • Ball - wedge:Shown in illustration

    • Wedge - wedge

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Wire bonding1

Wire Bonding

From Small Precision Tools

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Chapter 3 materials and basic processes

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Tape automated bonding tab

Tape Automated Bonding (TAB)

  • Connection made in two steps:

    • Inner Lead Bonding

      • Connecting tape to chip

    • Outer Lead Bonding

      • Connecting tape to substrate

  • Connection made by thermocompression

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Tape automated bonding tab1

Tape Automated Bonding (TAB)

  • Standard process:

    • Fabrication of gold bumps (Fig. 3.28):

      • Deposition of contact/barrier metals

      • Photolithography

      • Electroplating

      • Strip and etch barrier metals

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Tab continued

TAB, continued

  • Fig. 3.26: A picture of a TAB film with the Cu pattern, as well as the holes in the film for excising the circuits, and the sprocket holes for moving the film during processing.

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Tab continued1

TAB, continued

  • Fig. 3.27: The main steps in TAB processing.

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Tape automated bonding tab2

Tape Automated Bonding (TAB)

  • Wafer cutting

  • Fabrication of TAB film

    • Hole punching

    • Cu foil lamination

    • Lithography + etch of Cu pattern

    • Tinning of Cu

  • Inner lead bonding (ILB)

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Tab continued2

TAB, continued

  • Protection (glob top)

  • Testing

  • Outer lead bonding:

    • Excising, lead bending

    • Placement/thermode soldering

Electronic Pack….. Chapter 3 Materials and Basic Processes


Advantages of tab

Advantages of TAB:

  • High packaging density

  • Can contact chips with >1000 I/O

  • Excellent electrical properties (high frequency)

  • Robust mounting

  • Pre-testable (contrary to COB)

  • Gold bumps give hermetic seal to chip

  • Gang bonding gives high yield, is less time consuming than wirebonding

  • TAB film can be used as daughter board

Electronic Pack….. Chapter 3 Materials and Basic Processes


Disadvantages of tab

Disadvantages of TAB:

  • Non-standard wafer processes

  • Special custom design film for chip

  • Needs special machine/tool for OLB

  • Demanding repair

  • Low availability of std. chips and TAB service

  • Little standardization

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Flip chip

Flip chip

  • Active face of chip is flipped towards substrate

    • Substrate pads are identical to chip pads

  • Area array connections possible

  • All connections done simultaneously

  • Smallest possible footprint (1:1)

  • Short interconnections

    • Low inductance and resistance

    • Excellent electrical properties

  • Little flexibility

    • Change of chip pad configuration implies redesign of substrate

  • Small, but increasing amount of interconnections are flip chip

  • To be dealt with in much more detail…


Flip chip1

Flip Chip

  • Process:

    • Deposit barrier metals

    • Deposit solder bump metals (solder) by photolithography/metal mask and sputter or plating

    • Reflow

    • Cut wafer

    • Turn chip and mount on substrate

    • Heat substrate to reflow solder

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Flip chip history

Flip Chip, history

  • Introduced by IBM 1962

  • Flip chip has been used for decades, but with little impact

    • Wire bonding is far more common

    • Flip chip technology has not been considered mature

    • The industrial infrastructure has been small

  • The market share of flip chip connections is believed to increase significantly

    • Wire bonding will remain dominating for many years

  • Flip chip especially for ”advanced packaging”


Flip chip continued

Flip Chip, continued

  • Advantages:

    • Highest packing density

    • Excellent hi freq. properties

    • Up to 10 000 I/O

  • Disadvantages:

    • Very difficult placement and reliable solder/cleaning

    • Lack of thermal flexibility

Electronic Pack….. Chapter 3 Materials and Basic Processes


Flip chip consists of

Flip Chip consists of:

  • Chip

    • Si, GaAs, etc.

  • Substrate

    • Ceramic, organic, dielectic-covered metal, silicon, etc.

  • Interconnection system:

    • Metallization on chip and substrate pads

    • Chip (or substrate) bumps

    • Bonding material

    • Underfill encapsulant


Different flip chip technologies

Different Flip Chip technologies

  • Flip chip is not standardized!

From C. Lee, ESTC 2006, Dresden


Wire bonding tab and flip chip

Wire Bonding, TAB and Flip Chip

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Planar bonding with adaptive routing

Planar Bonding with Adaptive Routing

  • Fig. 3.32: Planar bonding with laser-assisted adaptive conductor routing. The top two figures a) and b) show a substrate cross section with details of the mounting of the chip in an etched through-hole. Figure c) shows the conductor layers and polyimide insulation on top of the substrate. The bottom figures show an exploded view of all the layers.

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End of chapter 3 materials and basic processes

End ofChapter 3 Materials and Basic Processes

  • Important issues:

    • Materials:

      • Distinguish between metals, ceramics, glasses and plastics

        • Important mechanical and thermal parameters like modulus of eleasticity, thermal expansion coefficient and thermal conductivity.

        • Important electrical parameters like dielectric constant and resistivity or conductivity

        • Have a basic understand of the importance and value of the most important materials parameter, and why they are important for the use of the specific material in specific applications.

        • For instance knowing the electrical conductivity of copper or thermal conductivity of epoxy within an accuracy of 25%

    • Basic processes

      • Lithographics, screen and stencil printing, etching, plating, vacuum deposition, sputtering, soldering, gluing, wire bonding, TAB, and flip chip

        • Other basic processes described in other chapters, like surface mount technology

  • Questions and discussions?

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