EEL-3705 Digital Logic Design

1. EEL-3705Digital Logic Design Spring 2006 Semester Professor R.J. Perry

2. Announcements • FSU First-Day Mandatory Attendance Policy • FAMU First-Week Mandatory Attendance Policy • ECE Course Prerequisite Policy • ECE Academic Dishonesty Policy • Today’s Agenda

3. Today’s Agenda • Sign-in sheet • EEL-3705 Course Outline and Objectives • ECE Prerequisite Policy Form • HW#1 • EEL-3705 Best Practices • EEL-3705 Software Distribution • Design Methodology • Design Abstraction • EEL-3705 Design Example • Chapter 1– Number Systems

4. Course Outline and Objectives

5. Course Notes • All slides will be available online • Exam, HW, and Quiz solutions online

6. HW#1Due 1/18/2006 • Individual assignment • If needed, enroll in course webpage • Review Course Outline • Read Chapter 0 • Complete Online Quiz #1 • Download HW grading sheet • “Digitally Drop” Word Document • Include your Name, Home University, Email Address, Intended major, and a brief essay (less than one page) on “Why you want to be an electrical or computer engineer?” • Send email to course instructor after dropping assignment • Submit grading sheet on 1/18/2006

7. Homework Assignments • Two weeks to complete an assignment • No excuse for: network down, printer out of toner, computer locks up, etc. • HW assignments will “overlap” • Average one assignment due every 1 ½ weeks. • HW’s will build upon one another • You may use solutions from previous HW’s • Homework assignments will be customized • Solutions will be given for a “general” problem • Individual online quizzes with most assignments • You must have working design for full credit

8. Homework Assignments • HW’s are “self-correcting” for the “right answer.” • I’ll check for the “correct” solution. • HW must be on time • Digital Drop Box (time stamped) • Both you and your partner must digitally submit. • Only one copy of handwritten notes needed per group. • Only one HW grading sheet needed per group. • HW is due at the BEGINNING of class!!!!!

9. EEL-3705 HW#2 • Due: 1/25/2006 • Reading Assignment: • Chapter 1 except for section 1.2.2 • Online Assignment: Quizzes #2 • Quiz A: Bin2Dec and Dec2Bin conversions • Quiz B: Two’s complement calculations • Quiz C: Binary addition • Quiz D: Binary subtraction • Book/Take-home Assignment: none • Quartus II Assignment: none • Comments: • Use % in front of binary results on online quizzes

10. Design Projects • Design projects DO NOT replace regular homework assignments. • You may have both due during the same week. • Hardware MUST work for more than ½ credit

11. TPS Quizzes • In-class quizzes. • Designed to “keep you awake.” • Mostly group quizzes • No make-up quizzes will be given • Used to monitor attendance • I will drop the three lowest quiz grades

12. Definition:System Design Process • Requirements Specification • Conceptualization • Analysis • Synthesis • Verification • Documentation Iteration

13. EEL-3705: System Design Process • Requirements Specification • Given by me: HW, Project, Exam, etc. • Conceptualization • Developed by you and your group • Iteration Design Cycle • Design Logic Circuit • Draw Logic Circuit • Debug Circuit Errors • Examine output results • Debug Logical Errors • Examine hardware results* • Debug Hardware Errors* Iteration

14. EEL-3705: System Design Process • Documentation • “Digitally dropped” into Blackboard Site This could take one hour or thirty hours depending on your skills. I will help you avoid “landmines”

15. EEL-3705 Best Practices Or, How do you get an A in this class?

16. Collaborative Learning Learning methodology in which students are not only responsible for their own learning but for the learning of other members of the group.

17. EEL-3705Best Practices • Keep up with the course!!! • Coming to class. • HW is 5% which is equal to ½ a letter grade • For example, w/o HW, you need 90 of 95 points (or 95%) for an A • Reading assignments. • HW assignments. • Quizzes • Project assignments • Complete the Assignments!!! • You will be allowed to work in groups, but

18. EEL-3705Best Practices The only way to learn to design logic circuits is to design logic circuits.

19. EEL-3705Best Practices In other words,practice makes perfect.

20. EEL-3705Best Practices Or,you will NOT learn how to design by watching me design

21. EEL-3705 Software Distribution

22. Quartus 5.0 Web Edition • MS Windows Digital Logic Design Software • Schematic Capture Editor • Complier • Design Simulator • Hardware Downloader • Available on COE network • Download link available on Blackboard site

23. Design Methodology

24. Definition: Engineering Design Methodology • A systematic approach to achieve the desired goal of a solution to the problem (i.e. working design) using proven principles or practices. • Must follow EEL-3705 “Best Practices” design methodology for full credit on assignments

25. “Right Answers” Violates “Best Practices” “Right answer” but not correct solution. “Best Practices Solution” Design Methodology

26. Design Abstraction How do we “describe” a system?

27. Y = A Design Abstraction Example: Design a “system” which will complement input A A F(x) A and Y are single bit values We can “describe” this design using a logical Truth Table

28. Levels of Design Abstraction Our goal in ECE is physical or hardware implementations of the design. In ECE, we “design” at several levels of “abstraction”

29. Levels of Design Abstraction • System: Assembly Language • Behavioral: VHDL • Logical: Gates • Electronic Circuit: Transistors • Integrated Circuit: IC Layout • Fabrication: IC Processing

30. Y = A Levels of Design Abstraction Example: Design a “system” which will complement input A SystemLevel: EEL-4746 (M68HC11) A ASM Code M68HC11 Assembly Language COMA STAA Y

31. Y = A Levels of Design Abstraction Example: Design a “system” which will complement input A BehavioralLevel: EEL-4712 A Not A VHDL Y <= not A;

32. Y = A Levels of Design Abstraction Example: Design a “system” which will complement input A GateLevel: EEL-3705 Digital Logic Design A Inverter or NOT gate

33. Y = A Levels of Design Abstraction Example: Design a “system” which will complement input A CircuitLevel: EEL-3300 Electronics I PFET A NFET CMOS Technology

34. Y = A Levels of Design Abstraction Example: Design a “system” which will complement input A Digital IC Design: EEL-4313 Digital IC Design VDD GND A CMOS Technology

35. Levels of Design Abstraction Fabrication Level: EEL-4330 Microelectronics Eng

36. Summary of Levels • System: Assembly Language • Behavioral: VHDL • Logical: Gates • Electronic Circuit: Transistors • Integrated Circuit: IC Layout • Fabrication: IC Processing

37. Summary • All “levels” give you the same result. • We will learn how to use the “logical” or gate level to its most effectiveness this semester.

38. EEL-3705Digital Logic Design

39. Microprocessor-Based System To I/O Microprocessor e.g. Pentium 4 Write software to control the system!!!!

40. Digital Logic Based System Design the “Digital Logic Core” to control the system!!!!!!

41. Design Example

42. Example 2– 2-bit Up Counter • State Diagram Clock is implied

43. Example – 2-bit Up Counter • State Table State Value Assignment Let Output Vector Let S0 = reset state

44. Example – 2-bit Up Counter • Truth Table

45. Example – 2-bit Up Counter • Excitation Equations

46. Moore Finite State Machine Next State Present State Output Vector Input Vector Clock Feedback Path Reset State Equations

47. Reg Block F Logic Y Vector H Logic Logic Diagram No X Vector in this Example No H Logic needed

48. Logic Diagram

49. Course Project

50. Temperature Sensors • Course Project • Design a simple temperature sensor using digital logic ADC = 8-bit Analog to Digital Converter Converts an analog signal into a digital signal Temp Sensor = Temp to voltage transducer (analog) Your design = “talks” to the ADC Display = LED based seven-segment display