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CSCE 212 Chapter 3: Arithmetic for Computers

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CSCE 212Chapter 3: Arithmetic for Computers

Instructor: Jason D. Bakos

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

- Binary and hex representation
- Converting between binary/hexidecimal and decimal
- Two’s compliment representation
- Sign extention
- Binary addition and subtraction

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

- Overflow for unsigned addition
- Carry-out

- Overflow for unsigned subtraction
- No carry-out

- Overflow for signed
- Overflow causes exception
- Go to handler address 80000080
- Registers BadVAddr, Status, Cause, and EPC used to handle

- SPIM has a simple interrupt handler built-in that deals with interrupts

- Test for signed ADD overflow:
addu$t0,$t1,$t2# sum but don’t trap

xor$t3,$t1,$t2# check if signs differ

slt$t3,$t3,$zero# $t3=1 if signs differ

bne$t3,$zero, No_OVF

xor$t3,$t0,$t1# signs of operands same, compare sign of result

slt$t3,$t3,$zero

bne$t3,$zero,OVF

- Test for unsigned ADD overflow:
addu$t0,$t1,$t2# sum but don’t trap

nor$t3,$t1,$zero# invert bits of $t1 (-$t1–1), 232-$t1-1

sltu$t3,$t3,$t2# 232-$t1-1 < $t2, 232-1 < $t1+$t2

bne$t3,$zero,OVF

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

1000

x 1001

1000

0000

0000

1000

1001000

multiplicand

multiplier

product

works with signed but must sign extend shifts

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

For signed, convert to positive and negate quotient if signs disagree

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

- Need a way to represent fractional numbers in binary
- Fixed-point
- Assume a decimal point at some location in a value:
- Example:
- 6-bit (unsigned) value
- = 1x21 + 0x20 + 1x2-1 + 1x2-2 + 0x2-3 + 1x2-4
- For signed, use two’s compliment
- Range = [-2N-1/2M, 2N-1/2M – 1/2M]
- For above, [-25/24, 25/24-1/24] [-2,2-1/16]

- Assume we have 4 binary digits to the right of the point…
- Convert .8749 to binary…
- .1101 = .8125
- Actual value – represented value = .0624 (bound by 2-4)

- Floating point represent values that are fractional or too large
- Expressed in scientific notation (base 2) and normalized
- 1.xxxx2 * 2yyyy
- xxxx is the significand (fraction) and yyyy is the exponent
- First bit of the significand is implicit
- Exponent bias is 127 for single-precision and 1023 for double-precision

- IEEE 754 standard
- Single-precision (2x10-38 to 2x1038)
- bit 31: sign of significand
- bit 30..23 (8) exponent
- bit 22..0 (23) significand

- Double-precision (2x10-308 to 2x10308)
- Significand is 52 bits and the exponent is 11 bits

- Single-precision (2x10-38 to 2x1038)
- Exponent => range, significand => precision
- To represent:
- zero: 0 in the exponent and significand
- +/- infinity: all ones in exponent, 0 in significand
- NaN: all ones in exponent, nonzero signficand

- To convert from decimal to binary floating-point:
- Significand:
- Use the iterative method to convert the fractional part to binary
- Convert the integer part to binary using the “old-fashioned” method
- Shift the decimal point to the left until the number is normalized
- Drop the leading 1, and set the exponent to be the number of positions you shifted the decimal point
- Adjust the exponent for bias (127/1023)

- Significand:
- When you max out the exponent, denormalize the significand

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

- Match exponents for both operands by un-normalizing one of them
- Match to the exponent of the larger number

- Add significands
- Normalize result
- Round significand

- Assume 11-bit limited representation:
- 1 bit sign bit
- 6 bit significand (precision 2-6 = 0.0156)
- 4 bit exponent (bias 7)
- range 1 x 2-7 (7.8 x 10-3) to 1.111111 x 28 (5.1 x 102)
- (assuming no denormalized numbers)

- Keep 2 additional bits to the right during intermediate computation
- Guard, round, and sticky

- Worst case for rounding:
- Actual number is halfway between two floating point representations
- Accuracy is measured as number of least-significant error bits (units in the last place (ulp))

- IEEE 754 guarantees that the computer is within .5 ulp (using guard and round)

- Un-bias and add exponents
- Multiply significands
- Move point

- Re-normalize
- Set sign based on sign of operands

- Review of topics from 211
- Overflow
- Binary Multiplication
- Binary Division
- IEEE 754 Floating Point
- Floating-Point Addition and Multiplication
- MIPS Floating-Point

- $f0 - $f31 coprocessor registers
- Used in pairs for doubles

- Arithmetic: [add | sub | mul | div].[s | d]
- Data transfer: lwc1, swc1 (32-bits only)
- Conditional branch:
- c.lt.[s | d] (compare less-than)
- bclt (branch if true), bclf (branch if false)

- Register transfer:
- mfc1, mtc1 (move to/from coprocessor 1, dest. is first)