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# A Transformation Based Algorithm for Reversible Logic Synthesis PowerPoint PPT Presentation

A Transformation Based Algorithm for Reversible Logic Synthesis. D. Michael Miller Dmitri Maslov Gerhard W. Dueck. Design Automation Conference, 2003. Objectives. Synthesis of Toffoli cascades reversible logic application in quantum computing low power CMOS optical computing Approach

A Transformation Based Algorithm for Reversible Logic Synthesis

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## A Transformation Based Algorithm for Reversible Logic Synthesis

D. Michael Miller

Dmitri Maslov

Gerhard W. Dueck

Design Automation Conference, 2003

### Objectives

• reversible logic

• application in

• quantum computing

• low power CMOS

• optical computing

• Approach

• use a naive algorithm to find a solution

• apply transformations to simplify the network

### Toffoli Gate Family

We use such gates for any number of inputs

### The Basic Algorithm

• Reversible function is given as a truth table

• For each row in the truth table

• Introduce Toffoli gates such that the output equals the input

• Make sure that previous outputs are not affected

Observe that after applying S3 wires are as in input

### The Basic Algorithm

c b a

in

000

001

010

011

100

101

110

111

out

001

000

011

010

101

111

100

110

S1

000

001

010

011

100

110

101

111

S1

000

001

010

011

100

110

101

111

S1

000

001

010

011

100

110

101

111

S2

000

001

010

011

100

111

101

110

S3

000

001

010

011

100

101

111

110

S3

000

001

010

011

100

101

111

110

S3

000

001

010

011

100

101

110

111

Final circuit

Read quantum array in inverse order to applying gates

in

000

001

010

011

100

101

110

111

out

111

000

001

010

011

100

101

110

need three gates

need only

one gate

### Bidirectional Algorithm

c b a

inputs

S2

000

001

010

111

100

101

110

011

S3

000

001

010

011

100

101

110

111

S1

000

111

010

001

100

011

110

101

in

000

001

010

011

100

101

110

111

out

111

000

001

010

011

100

101

110

ab

Final circuit

S1

After applying S3 my wires are the same as inputs

### Improvements

• Output permutations

• via swap gates

• Control input reduction

• there may be more than on possible assignment of control variables

• select the one that makes the function “simple”

• Template matching

### Templates

• Idea: replace a sequence of gates with an equivalent shorter sequence

• example:

rd53

naive

gates

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Average

4

72

477

1759

4179

6912

8389

7766

5615

3183

1391

453

104

15

1

7.65

5

87

550

1901

4267

6828

8221

7670

5610

3204

1402

455

104

15

1

7.67

1

14

92

380

1113

2468

4311

6083

7044

6754

5379

3549

1922

839

286

72

12

1

8.67

permutation

3

86

493

2312

6944

11206

10169

5945

2375

650

121

15

1

6.53

5

110

792

4726

11199

12076

7518

2981

767

130

15

1

6.18

12

6817

17531

11194

3752

844

134

15

1

5.63

input control

bidirectional

templates

optimal

### Future Work

• Start from a non-reversible function

• Verify the completeness of the templates

• Expand the algorithm to include Fredkin gates

• Select the best permutation (not by exhaustive search)