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VLSI System Design – ECES 681. Lecture: Interconnect -1 Prashant Bhadri pbhadri@ececs.uc.edu Office: Rhodes Hall - 933C Department of ECECS, College of Engineering, University of Cincinnati. Noise. What is noise?

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VLSI System Design – ECES 681

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VLSI System Design – ECES 681

Lecture: Interconnect -1

Prashant Bhadri

pbhadri@ececs.uc.edu

Office: Rhodes Hall - 933C

Department of ECECS, College of Engineering, University of Cincinnati


Noise

  • What is noise?

    • auditoryexperienceofsoundthatlacksmusicalquality; soundofanykind (especiallyunintelligibleordissonantsound)

    • Electrical noise may be said to be the introduction of any unwanted energy, which tend to interfere with the proper reception and reproduction of transmitted signals.


  • External Sources

    • Atmospheric

    • Industrial

    • Extraterrestrial

    • Solar noise

    • Cosmic noise

  • Internal Noise

    • This is the noise generated by any of the active or passive devices found in the receiver.

    • Can it be a transmitter?

    • How about on chip, in a system design, board design etc.


Chip Noise

  • Circuit noise includes all the disturbances induced by the circuit’s topology.

  • Interconnect noise includes noise coming from capacitive or inductive coupling between interconnects.

  • Power supply noise, which refers to deviations of the supply and ground voltages from their nominal values.

  • Substrate noise in mixed-signal integrated circuits: the charge injected in the substrate by the logic gates during the transitions may interfere severely with the operation of sensitive analog circuits.

Reference: Bartolo’s Thesis, Chapter 1


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Shot Noise

  • In a transistor the major contributor to noise is called shot noise.

  • The formula for shot noise in a diode is given as:


Thermal Noise

  • The noise generated by the agitation and interaction of electrons is called thermal noise. The internal kinetic energy of a particle can be expressed through its temperature.

  • The kinetic energy of a body is zero at a temperature of absolute zero.

  • The noise generated by a resistor, for example, is proportional to its absolute temperature as well as the bandwidth over which the noise is to be measured.


  • Any ordinary resistor not connected to a voltage source will have a voltage associated with it.

  • If the load is noiseless and is receiving the maximum noise power generated by our noisy resistor then:


Flicker Noise

  • Flicker noise dominates the noise spectrum at low frequency.

Reference: Noise Sources in Bulk CMOS, paper by Kent H. Lundberg


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Other Issues

  • Charge Injection

  • Capacitive Feed-through


Charge Injection

Solution

Problem

  • When the switch is on, the voltage across the sampling capacitor tracks the time-varying input signal within the bandwidth.

  • Some charges are present in the MOS channel, this is a result of forming a conducting channel under the MOS gate.

  • When the switch is turned off, charges either flow to the input source or to the sampling capacitor and create a small voltage which . is a function of several parameters which include input impedance, source impedance, clock falling edge, etc.

Reference: http://kabuki.eecs.berkeley.edu/~gchien/thesis/Masters/appB/appendixB.pdf


Clock Feed-through

  • When the clock voltage on the gate switches between high and low, this voltage.

  • drop is coupled into the signal via the capacitor divider.

  • The clock feed-through can be corrected to the first order by using a differential signal path.

  • As long as the error is present on both signal inputs and the same magnitude, it can be cancelled by taking the input differentially.

  • This technique, once again, depends on the absolute matching of transistors.

Reference: http://kabuki.eecs.berkeley.edu/~gchien/thesis/Masters/appB/appendixB.pdf


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


Reference: Digital System Engineeringhttp://eeclass.stanford.edu/ee273/


How will you remove noise during the chip design phase?   Any Ideas ??


Noise Figure

  • Used to assess the performance.

  • Additionally compares two devices in order to evaluate their performance + compares the signal and the noise at the same point to ensure that noise is not excess.

  • This term is used to describe how noisy a device is.

  • It is a ratio of the signal to ratio at the input to the signal to noise ratio at the output.


Reading Assignment

  • Paper Name : Design Methodologies for Noise in Digital Integrated Circuits

  • Author: Kenneth L. Shepard

  • Department of Electrical Engineering

  • Columbia University, New York, NY 10027

  • Website: http://www.cisl.columbia.edu/faculty/shepard/group/dac_noise.pdf


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