Chapter 5 The LC-3. Instruction Set Architecture. ISA = All of the programmer-visible components and operations of the computer memory organization address space -- how may locations can be addressed? addressibility -- how many bits per location? register set
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Note: Src and Dstcould be the same register.
this zero means “register mode”ADD/AND (Register)
this one means “immediate mode”ADD/AND (Immediate)
Note: Immediate field issign-extended.
What happens if bits [11:9] are all zero? All one?
R1 x3100R3 0R2 12
R4 M[R1]R3 R3+R4R1 R1+1
= info to be processed.
Unfilled arrow = control signal.
MAR and MARMUX