Scheduling Primitives for Bluespec Arvind Computer Science & Artificial Intelligence Lab

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Scheduling Primitives for Bluespec Arvind Computer Science & Artificial Intelligence Lab

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Scheduling Primitives for Bluespec Arvind Computer Science & Artificial Intelligence Lab

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Scheduling Primitives for Bluespec

Arvind

Computer Science & Artificial Intelligence Lab

Massachusetts Institute of Technology

Work in progress

http://csg.csail.mit.edu/arvind

outQ

Done?

mem

fifo

rule “recirculate”

x = mem.peek(); y = fifo.first();

if done?(x) then fifo.deq() ; mem.deq() ; outQ.enq(x)

else mem.deq(); mem.req(addr(x));

fifo.deq(); fifo.enq(y)

Need a way of

- saying deq happens before enq within the same rule

- building such a FIFO

http://csg.csail.mit.edu/arvind

Conditional

action

Parallel

Composition

Sequential

Composition

Method call

Guarded action

A program is a collection of instantiated modules m1 ; m2 ; ...

Module ::= Module name

[State variable r]

[Rule R a]

[Action method g (x) = a]

[Read method f (x) = e]

a ::= r := e

|if e then a

| a | a

| a ; a

| (t = e in a)

| m.g(e)

| a when e

e ::= r | c | t

| Op(e , e)

| e ? e : e

| (t = e in e)

| m.f(e)

| e when e

http://csg.csail.mit.edu/arvind

outQ

Done?

mem

fifo

Notice

module lpm

rule “recirculate”

action method enter(x) = mem.req(addr(x)) | fifo.enq(x)

Different made up syntax

(x = mem.peek() in (y = fifo.first() in

(if done?(x) then fifo.deq() | mem.deq() | outQ.enq(x)

else (mem.deq(); mem.req(addr(x)))

| (fifo.deq(); fifo.enq(y)))

http://csg.csail.mit.edu/arvind

- Guards affect the surroundings
(a1 when p1) | a2 ==> (a1 | a2) when p1

- Effect of an “if” is local
(if p1 then a1) | a2 ==> if p1 then (a1 | a2) else a2

p1 has no effect on a2

http://csg.csail.mit.edu/arvind

if p then a1 else a2

if p then a1 | if !p then a2

Similarly for cases

http://csg.csail.mit.edu/arvind

- Specify which state elements the rule modifies
- Let represent the value of all the registers before the rule executes
- Let U be the set of updates implied by the rule execution

http://csg.csail.mit.edu/arvind

reg-update ├ e v, (v != ┴)

├ (r := e) {(r , v)}

if-true ├ e true, ├ a U

├ (if e then a) U

Like a set union but blows up if there are any duplicates

if-false ├ e false

├ (if e then a)

par ├ a1 U1, ├ a2 U2

├ (a1 | a2) pmerge(U1,U2)

seq ├ a1 U1, update(,U1)├ a2 U2

├ (a1 ; a2) smerge(U1,U2)

Like pmerge but U2 dominates U1

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a-let-sub ├ e v, smerge(,{(t,v)})├ a U

├ ((t = e) in a) U

a-meth-call ├ e v , (v != ┴) ,x.a = lookup(m.g),

smerge(,{(x,v)}) ├ a U

├ m.g(e) U

Expression rules are similar

http://csg.csail.mit.edu/arvind

a-when-ready

├ e true, ├ a U

├ (a when e) U

e-when-ready-true

├ e1 v, ├ e2 true

├ (e1 when e2) v

e-when-ready-false

├ e1 v, ├ e2 false

├ (e1 when e2) ┴

- If no rule applies, e.g., if e in (a when e) returns false, then the system is stuck and the effect of the whole atomic action of which (a when e) is a part is “no action”.

http://csg.csail.mit.edu/arvind

Highly non-deterministic

Repeatedly:

- Select a rule to execute
- Compute the state updates
- Make the state updates

Implementation concern: Schedule multiple rules concurrently without violating one-rule-at-a-time semantics

http://csg.csail.mit.edu/arvind

outQ

Done?

mem

fifo

module lpm

rule “recirculate”

action method enter(x) = mem.req(addr(x)) | fifo.enq(x)

Can a rule calling method “enter” execute concurrently with the “recirculate” rule ?

If not who should have priority?

(x = mem.res() in (y = fifo.first() in

(if done?(x) then fifo.deq() | mem.deq() | outQ.enq(x)

else (mem.deq(); mem.req(addr(x)))

| (fifo.deq(); fifo.enq(y)))

http://csg.csail.mit.edu/arvind

Rule R1 a1 when p1

Rule R2 a2 when p2

Scheduling Primitives:

1. S = par(R1,R2)

where the meaning of rule S is

Rule S ((if p1 then a1)|(if p2 then a2)) when (p1 xor p2)

2. S = compose(R1,R2)

where the meaning of rule S is

Rule S ((a1 when p1);(a2 when p2))

3. S = restrict(R1,R2)

where the meaning of rule S is

Rule S (a2 when (!p1 & p2))

http://csg.csail.mit.edu/arvind

Grammar

S ::= R

| compose(S, S)

| par(S, S)

| restrict(S, S)

1. The user must specify a schedule

2. A rule can occur multiple times in a schedule

Such schedules combined with rule-splitting lets the user specify concurrency safely in execution

http://csg.csail.mit.edu/arvind

module lpm

rule “recirculate”

(x = mem.res() in (y = fifo.first() in

(if !done?(x) then (mem.deq(); mem.req(addr(x)))

| (fifo.deq(); fifo.enq(y)))

rule “exit”

(x = mem.res() in (y = fifo.first() in

(if done?(x) then fifo.deq() | mem.deq() | outQ.enq(x)

action method enter(x) = mem.req(addr(x)) | fifo.enq(x)

http://csg.csail.mit.edu/arvind

enter has priority over recirculate; no dead cycles

- Schedule-1
rc = restrict(enter,recirculate)

ee = compose(exit,enter)

ex = restrict(ee,exit)

en = restrict(exit,enter)

S1 = par(rc,ee,en,ex)

- Schedule-2
er = restrict(recirculate, enter)

ee = compose(exit,er)

ex = restrict(ee,exit)

en = restrict(er,exit)

S2 = par(ee,en,ex)

recirculate has priority over enter; no dead cycles

Difficult to pick between S1 and S2!

http://csg.csail.mit.edu/arvind

- Market forces are demanding a much greater variety of SoCs
- The design cost for SoCs has to be brought down dramatically by facilitating IP reuse
- High-level synthesis tools are essential for architectural exploration and IP development

Bluespec and associated tools are a promising solution to this problem

http://csg.csail.mit.edu/arvind

- The Blusepec Inc Web site http://bluespec.comhttp://bluespec.com/products/Papers.htm
- Contact Bluespec Inc to get a free copy of the BSV language manual. For other publications: http://csg.lcs.mit.edu/pubs/bluespecpubs.html
- The 6.375 subject at MIT: Complex Digitial Systems http://csg.csail.mit.edu/6.375/

Thanks for listening

http://csg.csail.mit.edu/arvind