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Image redundant wire identification. Speaker: Yung-chih Chen. Outline. Introduction Previous work Possible approach Future work. == img != function. 0 0 1 1 0 1 0 1. 0 0 1 1 0 1 0 1. 0 1. 0 1. 0 0 1 0 1 1. Image eq. 0 0 1 0 1 1. Introduction. Image equivalence.

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Presentation Transcript
outline
Outline
  • Introduction
  • Previous work
  • Possible approach
  • Future work
introduction

==img

!=function

0 0 1 1

0 1 0 1

0 0 1 1

0 1 0 1

0 1

0 1

0 0 1

0 1 1

Image eq.

0 0 1

0 1 1

Introduction
  • Image equivalence

Image redundant wire

random simulation flow chat
Random simulation flow chat

Legal Vectors

Reference

Model

Constraint

circuit

Optimized

constraint

circuit

Output

Comparator

Random

Vector

Generator

Design

Under

Verification

(DUV)

Coverage Feedback

problem formulation

circuit

DUV

Optimized

Circuit

DUV

optimize

Problem formulation
  • Input
    • A constraint circuit A’
  • Output
    • A optimized constraint circuit B’
  • Objective
    • Size of B’ << size of A’
    • B’ ==img A’
previous work
Previous work
  • Remove tree structure
  • Use the rewiring technique to construct tree structure
  • Characteristic BDD
  • Circuit partition
remove tree structure
Tree structure

No multiple fanouts

Replace the tree structure by a primary input

Remove tree structure
characteristic bdd

y1

y1

y2

y2

Smoothing

all input

y2

x1

x1

1

0

x2

x2

1

0

Characteristic BDD
  • Use characteristic BDD and smoothing technique to verify image equivalence

1: legal output

0: illegal output

remove primary input
Remove primary input
  • Assign constant value to PI to reduce circuit (cofactor)
  • Check
    • If Fxi=0 ==img org circuit, then we set constant 0 to PI xi, and optimize circuit.
    • If Fxi=1 ==img org circuit, then we set constant 1 to PI xi, and optimize circuit.
example

x

y

y

c

x

x

c

image

b

y

y

b

b

a

a

cofactor

c=0

x

1

1

0

0

y

y

1

0

b

b

b

Image eq.

a

a

image

1

0

Example

Order: x < y < c < b < a

a

b

c

x

y

a

b

x

y

circuit partition

Vertical partition

horizontal partition

mixed partition

Circuit partition
  • For each circuit, we can do vertical partition or horizontal partition into some subcircuit
summary
Summary
  • Remove tree structure
  • Use the rewiring technique to construct tree structure
  • Characteristic BDD
    • Iteratively remove PIs
  • Circuit partition
possible approach
Possible approach
  • Algorithm for image redundant wires identification
  • Iteratively remove PIs
slide17
Idea
  • Img of F = Img of Fxi=0∪ Img of Fxi=1
  • If Img of Fxi=0≤ Img of Fxi=1, then we set xi=1 and optimize the circuit
  • If Img of Fxi=1≤ Img of Fxi=0, then we set xi=0 and optimize the circuit
slide18
Idea
  • Img of Fxi=0 =

Img of Fxi=0, X-xi=A∪ Img of Fxi=0, X-xi=B

  • Img of Fxi=1 =

Img of Fxi=1, X-xi=A∪ Img of Fxi=1, X-xi=B

  • Img of Fxi=0, X-xi=B= Img of Fxi=1, X-xi=B?

A is the set of X-xi such that the effect xi can be propagated to POs

B is the set of X-xi such that the effect xi cannot be propagated to POs

future work
Future work
  • Propose an algorithm for image redundant PIs identification
    • Analyze Img of Fxi=0and Img of Fxi=1
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