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Building an Internet Router (P33) Dr Andrew W. Moore [email protected] Handout 1: What’s a router? Class project and logistics Thank you supporters: Some logistics Web page: http://www.cl.cam.ac.uk/teaching/0910/P33/ TAs: David Miller (Hardware) [email protected]

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Building an internet router p33 l.jpg

Building an Internet Router (P33)

Dr Andrew W. Moore

[email protected]

Handout 1: What’s a router?

Class project and logistics

Thank you

supporters:

Building an Internet Router (P33)Handout 1


Some logistics l.jpg
Some logistics

Web page: http://www.cl.cam.ac.uk/teaching/0910/P33/

TAs:

David Miller (Hardware) [email protected]

Stephen Kell (Software) [email protected]

Hot-spare TAs:

Phil Watts (Hardware) philip.watts @cl.cam.ac.uk

Chris Smowton (Software)[email protected]

Grades:

Mphil (ACS) – Pass / Fail - based on a mark out of 100

All others (DTC) – Mark out of 100

Building an Internet Router (P33)Handout 1


Some more logistics l.jpg
Some more logistics

Class Mailing list: [email protected]

think of this as a self-help mailing list for all of you

Staff Mailing list: [email protected]

Submission mail: [email protected]

Group aliases can appear if you require them.


What is routing l.jpg

D

R3

R1

R4

D

A

B

E

R2

C

R5

Destination

Next Hop

F

D

R3

E

R3

F

R5

What is Routing?


What is routing5 l.jpg

R3

R1

R4

D

A

1

4

16

32

D

Ver

HLen

T.Service

Total Packet Length

Fragment ID

Flags

Fragment Offset

B

E

TTL

Protocol

Header Checksum

20 bytes

Source Address

R2

C

R5

Destination Address

Destination

Next Hop

F

D

R3

Options (if any)

E

R3

Data

F

R5

What is Routing?


What is routing6 l.jpg

R3

R1

R4

D

A

B

E

R2

C

R5

F

What is Routing?


Points of presence pops l.jpg

POP3

POP2

POP1

D

POP4

A

B

E

POP5

POP6

C

POP7

POP8

F

Points of Presence (POPs)


Where high performance routers are used l.jpg
Where High Performance Routers are Used

(10 Gb/s)

R2

(10 Gb/s)

R1

R6

R5

R4

R7

R3

R9

R10

R8

R11

R12

R14

R13

R16

R15

(10 Gb/s)

(10 Gb/s)


What a router looks like l.jpg
What a Router Looks Like

Cisco CSR-1

Juniper T320

19”

19”

Capacity: 92Tb/sPower: 4.7kW

Capacity: 320Gb/sPower: 2.9kW

6ft

3ft

2ft

2.5ft


Basic architectural components of an ip router l.jpg

Software

Hardware

Basic Architectural Componentsof an IP Router

Management

& CLI

Routing

Protocols

Control Plane

Routing

Table

Datapath

per-packet

processing

Forwarding

Table

Switching


Per packet processing in an ip router l.jpg
Per-packet processing in an IP Router

1. Accept packet arriving on an incoming link.

2. Lookup packet destination address in the forwarding table, to identify outgoing port(s).

3. Manipulate packet header: e.g., decrement TTL, update header checksum.

4. Send packet to the outgoing port(s).

5. Buffer packet in the queue.

6. Transmit packet onto outgoing link.


Generic router architecture l.jpg

Data

Hdr

Data

Hdr

IP Address

Next Hop

Address

Table

Buffer

Memory

Generic Router Architecture

Header Processing

Lookup

IP Address

Update

Header

Queue

Packet

~1M prefixes

Off-chip DRAM

~1M packets

Off-chip DRAM


Generic router architecture13 l.jpg

Data

Data

Data

Hdr

Hdr

Hdr

Header Processing

Header Processing

Header Processing

Lookup

IP Address

Lookup

IP Address

Lookup

IP Address

Update

Header

Update

Header

Update

Header

Address

Table

Address

Table

Address

Table

Data

Data

Hdr

Hdr

Data

Hdr

Generic Router Architecture

Buffer

Manager

Buffer

Memory

Buffer

Manager

Buffer

Memory

Buffer

Manager

Buffer

Memory


The p33 project build a 4 port x 1ge router l.jpg

Software

Hardware

The P33 Project:Build a 4-port x 1GE Router

Management

& CLI

Software Team

Develop s/w in Linux

on PC in lab

Routing

Protocols

Exception

Processing

Routing

Table

Hardware Team

Develop h/w in Verilog

on NetFPGA board

in lab

Forwarding

Table

Switching


Slide15 l.jpg

Management

& CLI

Routing

Protocols

Exception

Processing

Routing

Table

Emulated

h/w in VNS

1

2

3

4

5

6

Build basic router

Command Line Interface

Routing Protocol

(PWOSPF)

Integrate with H/W

Interoperability

Wow us!

Management

& CLI

Management

& CLI

  • Innovate and add!

  • Presentations

  • Judges

Routing

Protocols

Routing

Protocols

Exception

Processing

Exception

Processing

Routing

Table

Routing

Table

Emulated

h/w in VNS

Emulated

h/w in VNS

Management

& CLI

Routing

Protocols

Exception

Processing

software

Routing

Table

21/Oct

28/Nov

5/Nov

11/Nov

18/Nov

10/Jan

hardware

Forwarding

Table

Switching

Learning Environment

Modular design

Testing

Forwarding

Table

Switching

4-port non-learningswitch

4-port learningswitch

IPv4 routerforwarding path

Integrate with S/W

Interoperability

Wow us!

21/Oct

28/Nov

5/Nov

11/Nov

18/Nov

10/Jan


What is the netfpga l.jpg
What is the NetFPGA?

PC with NetFPGA

1GE

FPGA

1GE

1GE

Memory

1GE

NetFPGA Board

NetworkingSoftware

running on a standard PC

CPU

Memory

PCI

A hardware accelerator

built with Field Programmable Gate Arraydriving Gigabit network links


Running the router kit user space development 4x1ge line rate forwarding l.jpg
Running the Router KitUser-space development, 4x1GE line-rate forwarding

PW-OSPF

user

kernel

Routing

Table

“Mirror”

1GE

FPGA

Fwding

Table

Packet

Buffer

1GE

1GE

1GE

1GE

IPv4

Router

1GE

Memory

1GE

1GE

Management (including CLI)

CPU

Memory

Exception

Processing

PCI


Next steps l.jpg
Next steps

  • Explore the web page

    (http://www.cl.cam.ac.uk/teaching/0910/P33/)

  • Decide if you still want to take the class

  • Build a team of 3 people: 2 s/w and 1 h/w

  • Come to SW02 on Tuesday 10am…

    We will meet with you every week during class time.


Using the nf test machines l.jpg
Using the nf-test machines

  • Each group is allocated an nf-test machine

    {nf-test1,nf-test2,nf-test3,...}.nf.cl.cam.ac.uk

  • These machines are headless (no KVM) and located in SW02 (alcove)

  • Login via ssh; set your own password and go

    We suggest running “vncserver” and then using “vncviewer”; as a useful way to leave jobs/desktop running and reconnect if you need to move location.

  • SW02 is a busy classroom – please respect others

    If you need to gain physical access to an nf-test machine

    Do it quietly! You maybe refused entry in the afternoons – don’t take it personally.


Nf test machine rules l.jpg
nf-test machine rules

  • Abuse the machines – that’s the end of this module for you – zero tolerance policy.

  • only connect eth0 to the cisco (access) switch

  • these machines run a firewall for a reason

    • if it doesn’t work for you, lets fix the rules

  • Play nicely with each other; your interoperability marks depend on it.


Nf test machine information l.jpg
nf-test machine information

  • Warning: Files stored on nf-test machines are not backed up - and may be lost at any time.

  • You must make sure that you regularly copy your files into your REAL (computer laboratory) home directory as a back-up

  • Machines fail – they usually fail 24 hours before the big deadline!


Tree structure l.jpg
Tree Structure

NF2

bin

(scripts for running simulations and setting up the environment)

bitfiles

(contains the bitfiles for all projects that have been synthesized)

lib

(stable common modules and common parts needed for simulation/synthesis/design)

projects

(user projects, including reference designs)


Tree structure 2 l.jpg
Tree Structure (2)

lib

C

(common software and code for reference designs)

java

(contains software for the graphical user interface)

Makefiles

(makefiles for simulation and synthesis)

Perl5

(common libraries to interact with reference designs and aid in simulation)

python

(common libraries to aid in regression tests)

(scripts for common functions)

scripts

verilog

(modules and files that can be reused for design)


Tree structure 3 l.jpg
Tree Structure (3)

projects

doc

(project specific documentation)

(contains file to include verilog modules from lib, and creates project specific register defines files)

include

(regression tests used to test generated bitfiles)

regress

(contains non-library verilog code used for synthesis and simulation)

src

sw

(all software parts of the project)

(contains user .xco files to generate cores and Makefile to implement the design)

synth

verif

(simulation tests)


State diagram to verilog 1 l.jpg
State Diagram to Verilog (1)

MAC

RxQ

CPU

RxQ

MAC

RxQ

CPU

RxQ

MAC

RxQ

CPU

RxQ

MAC

RxQ

CPU

RxQ

Input Arbiter

Output Port Lookup

Output Queues

MAC

TxQ

CPU

TxQ

MAC

TxQ

CPU

TxQ

MAC

TxQ

CPU

TxQ

MAC

TxQ

CPU

TxQ


Inter module communication l.jpg
Inter-module Communication

Module

i

Module i+1

data

ctrl

wr

rdy


State diagram to verilog 2 l.jpg
State Diagram to Verilog (2)

  • Projects:

    • Each design represented by a project

      Format: NF2/projects/<proj_name>

      e.g., NF2/projects/bir_starter

    • Consists of:

    • What is Missing?

      • refer to the web page

        “Implement four port hard-wired switch” is the start.

  • Verilog source

  • Simulation tests

  • Hardware tests

  • Libraries

  • Optional software


State diagram to verilog 3 l.jpg
State Diagram to Verilog (3)

  • Projects (cont):

    • Pull in modules from NF2/lib/verilog

      • Generic modules that are re-used in multiple projects

      • Specify shared modules in project’s include/lib_modules.txt

    • Local src modules override shared modules

    • bir_starter:

      • Local in_arb_regs.v input_arbiter.v output_port_lookup.v

      • Everything else: shared modules


Testing simulation 1 l.jpg
Testing: Simulation (1)

  • Simulation allows testing without requiring lengthy synthesis process

  • NetFPGA provides Perl simulation infrastructure to:

    • Send/receive packets

      • Physical ports and CPU

    • Read/write registers

    • Verify results

  • Simulations run in ModelSim/VCS


Testing simulation 2 l.jpg
Testing: Simulation (2)

  • Simulations located in project/verif

  • Multiple simulations per project

    • Test different features

  • Example:

    • bir_starter/verif/test_fwd_sourcePort0

      • Test forwarding of packets from port 0 to port 1


Testing simulation 3 l.jpg
Testing: Simulation (3)

  • Example functions:

    • nf_PCI_read32(delay, batch, addr, expect)

    • nf_PCI_write32(delay, batch, addr, value)

    • nf_packet_in(port, length, delay, batch, pkt)

    • nf_expected_packet(port, length, pkt)

    • nf_dma_data_in(length, delay, port, pkt)

    • nf_expected_dma_data(port, length, pkt)

    • make_IP_pkt(length, da, sa, ttl, dst_ip, src_ip)


Running simulations l.jpg
Running Simulations

  • Use command nf2_run_test.pl

    • Optional parameters

      • --major <major_name>

      • --minor <minor_name>

      • --gui (starts the default viewing environment)

        test_fwd_sourcePort0

  • Problems? check the environment variables reference your project

    • NF2_DESIGN_DIR=/root/NF2/projects/<project>

    • PERL5LIB=/root/NF2/projects/<project>/lib/Perl5:

      /root/NF2/lib/Perl5:

major

minor


Running simulations33 l.jpg
Running Simulations

  • When running modelsim interactively:

    • Click "no" when simulator prompts to finish

    • Changes to code can be recompiled without quitting ModelSim:

      • bash# cd /tmp/$(whoami)/verif/<projname>;

        make model_sim

      • VSIM 5> restart -f; run -a

    • Problems?

      do ensure $NF2_DESIGN_DIR is correct


Synthesis l.jpg
Synthesis

  • To synthesize your project

    • Run make in the synth directory

      (/root/NF2/projects/bir_starter/synth)


Regression tests l.jpg
Regression Tests

  • Test hardware module

  • Perl Infrastructure provided includes:

    • Read/Write registers

    • Read/Write tables

    • Send Packets

    • Check Counters


Example regression tests l.jpg
Example Regression Tests

  • For a Router…

    • Send Packets from CPU

    • Longest Prefix Matching

    • Longest Prefix Matching Misses

    • Packets dropped when queues overflow

    • Receiving Packets with IP TTL <= 1

    • Receiving Packets with IP options or non IPv4

    • Packet Forwarding

    • Dropping packets with bad IP Checksum


Perl libraries l.jpg
Perl Libraries

  • Specify the Interfaces

    • eth1, eth2, nf2c0 … nf2c3

  • Start packet capture on Interfaces

  • Create Packets

    • MAC header

    • IP header

    • PDU

  • Read/Write Registers

  • Read/Write Reference Router tables

    • Longest Prefix Match

    • ARP

    • Destination IP Filter


Regression test examples l.jpg
Regression Test Examples

  • Reference Router

    • Packet Forwarding

      • regress/test_packet_forwarding

    • Longest Prefix Match

      • regress/test_lpm

    • Send and Receive

      • regress/test_send_rec


Creating a regression test l.jpg
Creating a Regression Test

  • Useful functions:

    • nftest_regwrite(interface, addr, value)

    • nftest_regread(interface, addr)

    • nftest_send(interface, frame)

    • nftest_expect(interface, frame)

    • $pkt = NF2::IP_pkt->new(len => $length,            DA => $DA, SA => $SA,            ttl => $TTL, dst_ip => $dst_ip,            src_ip => $src_ip);


Creating a regression test 2 l.jpg
Creating a Regression Test (2)

  • Your task:

    • Template files

      /root/NF2/projects/bir_starter/regress/test_fwd_sourcePort0/run.pl

    • Implement your Perl verif tests


Running regression test l.jpg
Running Regression Test

  • Run the command

    nf2_regress_test.pl --project bir_starter


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