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High-productivity development environments for certifiably dependable systems

High-productivity development environments for certifiably dependable systems. NITRD / HCSS National Workshop on Aviation Software Systems: Design for Certifiably Dependable Systems. Dr. Darren Cofer Staff Scientist Honeywell Laboratories Minneapolis MN darren.cofer@honeywell.com

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High-productivity development environments for certifiably dependable systems

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  1. High-productivity development environments for certifiably dependable systems NITRD / HCSS National Workshop on Aviation Software Systems: Design for Certifiably Dependable Systems Dr. Darren Cofer Staff Scientist Honeywell Laboratories Minneapolis MN darren.cofer@honeywell.com 612-951-7279

  2. The problem with software… [-1] software = time * money [-2] time = money [-3] money = SQRT(evil) |–––––––––––– [ 1] software = evil

  3. Is it really evil? • Imagine building the mechanical components of an aircraft today without structural & aerodynamic analyses • “We’ll just build it and see if it flies.” • no consistent design discipline to support the level of system complexity currently implemented in software • CS grads trained as programmers but doing systems engineering • All software-related failures are due to design errors • doesn’t break or wear out • testing and HW fault-models inadequate • Software is too easy to change • susceptible to new errors at all life-cycle stages • Software errors are logical errors • obscured by representation • difficult to detect errors by inspection

  4. The solution… 000101101010001001 100101110110000010111101011 101001111011101100111011111111 1010100111011001010001111101 11001000101011010111111000 10010010001010101001001011111 10101110100010111011100110101 110010101010101000111110111 1111010011010001001000011 000101010001001101010001 00010010010101110000111000 1100010100100100000011 1111011101011101 SOFTWARE ELIMINATION

  5. Well not really… • Literally: Use custom hardware where it makes sense • reusable soft cores, FPGA/ASIC, SoC technologies • multicore processors = true concurrency • translate data flow models to data flow HW (not seq’l SW) • Figuratively: Emulate what’s good about hardware • well-defined and scoped languages with well-established semantics • well-defined and constrained interfaces • composability (with predictable results) • standard reusable components and subsystems (ex: OS, comm) • analyzable

  6. www.honeywell.com

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