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TDAQ news and miscellaneous reports

TDAQ news and miscellaneous reports. M. Sozzi NA62 TDAQ WG meeting CERN – 13/7/2011. Today’s meeting. TDCB - Cables. Cables: two solutions (TCC and I2S), very similar Anyway cannot easily measure differences in Pisa TCC is cheaper and can be purchased in limited quantities

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TDAQ news and miscellaneous reports

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  1. TDAQ news and miscellaneous reports M. Sozzi NA62 TDAQ WG meetingCERN – 13/7/2011

  2. Today’s meeting

  3. TDCB - Cables Cables: two solutions (TCC and I2S), very similarAnyway cannot easily measure differences in Pisa TCC is cheaper and can be purchased in limited quantities Plan: buy TCC cables for the first pre-production(6m length unless explicitly requested otherwise) Check differences with (single) I2S cable on RICH test setup (PG)?

  4. TDCB - boards Extensive documentation being prepared Current cost estimate:1000 € / board (128ch) + 125 € / cable (32 ch, 6m)[1500 € overall] • Two V5 board prototypes received: fully equivalent to V4, but different manifacturer/mounting firmCurrently under test in Pisa • Firmware still requires extensive testing (designer left)

  5. TDCB - boards Groups should arrange testing (with TELL1s): RICH: validation in Perugia (M. Piccini)LAV: validation in Frascati (M. Raggi) CEDAR: validation in Birmingham (A. Romano)STRAWS (fallback): validation in CERN (A. Sergi)MUV: ?CHANTI: ?SAC/IRC (if used?): ? Pre-production (12 boards) to start very soon.Finalize orders NOWSubsequent production when?(discussion)

  6. TELL1 5 additional TELL1 (on loan from LHCb) - CERN: - Mainz:- Napoli:- LNF:- One still available Lots of TDCB testing and even part of firmware development can be done using TELL1

  7. TEL62 One prototype tested with all daughter-cards (incl. TDCBs)Some overheating issues to be assessedSome CCPC software issues with firmware loading (JAM) • Mount second prototype soon • Extensive testing as firmware is developed (TDCB, GbE, DDR, QDR) • Build 10 in 2011(and 0 in 2012?) • Current cost estimate: 3500 €

  8. TEL62 firmware New framework for TEL62 startedLoosely based on LHCb implementation Manpower issues still presentInvolvement of 1 person per sub-detector neededRICH: C. Santoni (PG)LAV: ?MUV: ?CEDAR: ?LKr: G. Lamanna (CERN)LKr/L0: A. Salamon (Roma TV)CHANTI: ?MUV: ?SAC/IRC: ?

  9. CRATES Wiener crates are good for both TELL1/TEL62: 2 prototypes (7700 €/crate) bought (Roma TV and Frascati) but not yet there. Validation? Ordering? Delivery times? Expect full software support from CERN Some mini-crates available Advice: arrange patched power solution

  10. L0TP • Torino group (E. Menichetti) entering the game • Dedicated meeting in June:- Aim at implementation on a PC with a single existing PCIe card (Altera development board by Terasic) with additional NA62-specific daughter cards (one ordered) Stratix IV GXPCIe 8x4 GbE on-boardDDR on-boardClock inputs2 connectors for daughter cards

  11. L0TP Plan:- Ferrara to provide the board firmware- Torino to provide the daughter cards- L0 trigger-matching code (on PC) not yet covered (1) Is this solution viable in terms of L0 latency? (2) L0TP for 2012 run(s): (a) prototype version of PC-based L0TP OR(b) “patched” temporary solution (e.g. Talk board) Assessment of (2) (and (1)?) by fall 2011

  12. General infrastructure / to do • TTC network installation (fibres & splitters ordering): proposal finalized (see M. Krivda talk) • Wiener crates validation (crates are late!) • TELL1 radiation tests? (Birmingham) • Common ethernet data-transfer software layer ? Expert working, expect proposal for discussion • Adoption of “official” VME single-board computer • Seeking LHCb support for porting of online software • Need a CERN server for software and documentation • Database information

  13. Specification issues • Do we need/want fine time (sub 25-ns) information together with each L0 trigger? How many bits? Easy solution: eating up some of the 6 bits for L0 trigger word. • Data format finalization (see note NA62-11-02) • Data endianness?

  14. L1/L2 triggers • Recipe to reach 100 kHz using independently-computed L1 trigger primitives ?- Straw chambers (see talks by D. Madigojine, J. Pinzino)Severe pile-up issue- Other sub-detectors? • Recipe to cut down rate in L2 ? Probably easy, but: Which reconstructions needed (at which level) ? Time required?

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