CORDIC (Coordinate rotation digital computer)

1. CORDIC(Coordinate rotation digital computer) VLSI Signal Processing 台灣大學電機系 吳安宇 Ref: Y. H. Hu, “CORDIC based VLSI architecture for digital signal processing,” IEEE Signal Processing Mag., pp.16-35, July 1992.

2. Rotation Operation You need:4 multipliers. 2 adders. or ROM for Table Look-up

3. What is “CORDIC” ? • COordinate Rotation DIgital Computer • •Why do we use “CORDIC” ? • MAC dominates the implementational cost in some DSP functions. • The DSP approach, CORDIC, helps to save the hardware cost.

4. Basic Concept of The CORDIC • To decompose the desired rotationangle (θ)into the weighted sum of a set of predefined elementary rotationangles (am(i)) • Such that the rotation through each of them can be accomplished with simple shift-and-add operation.

5. In General Case: In CORDIC Algorithm:

6. V(1) V(3) V(0) Behavior of CORDIC

7. CORDIC Algorithm

8. Initiation:Given x(0),y(0),z(0) For i=0 to n-1 ,Do /*CORDIC iteration equation */ /*Angle updating equation*/ End i loop /*Scaling Operation (required for m=±1 only)*/

9. X(i) Y(i) Basic Processor for CORDIC a(n-1) a(1) a(0) X-Reg Y-Reg Barrel shifter Barrel shifter Z-reg +/- +/- X(i+1) Y(i+1) Z(i+1)

10. θ Modes of Operations • Vector rotation mode (θ is given) : determined by the set of  The objective is to compute the final vector (Usually, we set z(0)=θ.)  = sign of z(i)

11. Modes of Operations (cont’d) • Angle accumulation mode (θ is not given) The objective is to rotate the given initial vector back to x-axis ,and the angle can be accrued.(Now, we let z(0)=0.) V(0) θ X-axis  = - sign of x(i)·y(i) V(1)

12. Scaling Operation

13. X(n) Y(n) Scaling Stage X-Reg X(n) Y(n) Y-Reg Barrel shifter Barrel shifter +/- +/-

14. Advantages and Disadvantages Simple Shift-and-add Operation. (2 adders+2 shifters v.s. 4 mul.+2 adder) -It needs n iterations to obtain n-bit precision. -Slow carry-propagate addition. -Low throughput rate -Area consuming shifting operations.

15. How to Improve CORDIC ? • Use Pipelined Architecture • Improve the Performance of the Adders (redundant arithmetic, CSA) • Reduce Iteration Number • High radix CORDIC. (e.g., Radix-4, Radix-8) • Find a optimized shift sequence (e.g., AR-CORDIC) • Improve the Scaling Operation • – Canonical multiplier recoding • – Force Km to 2.

16. Basic CORDIC Processor1 Basic CORDIC Processor2 Basic CORDIC Processor n+s x(0) y(0) Basic CORDIC Processor 1 Basic CORDIC Processor 2 Basic CORDIC Processor n+s L A T C H L A T C H L A T C H Parallel and Pipelined Arrays

17. In General Case: In CORDIC Algorithm:

18. Generalized CORDIC Algorithm m0 , linear system ; m=1 , circular system ; m=-1 , hyperbolic system.

19. V(1) V(3) V(4) V(2) V(1) V(0) V(3) V(2) V(0) V(3) V(2) V(1) V(0) Hyperbolic Different coordinates Circular Linear

20. Initiation: Given x(0),y(0),z(0) For i=0 to n-1 ,Do /*CORDIC iteration equation */ /*Angle updating equation*/ End i loop /*Scaling Operation (required for m=±1 only)*/

21. Shift Sequence{s(m,i); 0in-1} Determine the convergence of the CORDIC iteration, as well as the magnitude of the scaling factorKm(n). m=0 or 1 , s=(m,i)=i m=-1 , s(-1,i)=1,2,3,4,4,5,….,12,13,14,14,.. An angle approximation error:

22. Application to DSP Algorithms • Linear transformation: • - DFT, Chirp-Z transform, DHT, and FFT. • Digital filters: • - Orthogonal digital filters, and adaptive lattice filters. • Matrix based digital signal processing algorithms: • - QR factorization, with applications to Kalman filtering • - Linear system solvers, such as Toeplitz and covariance system solvers,……,etc.

23. FFT application -1

24. Butterfly unit + + - CORDIC processor -

25. Conclusions • In some cases, CORDIC evaluates rotational functions more efficiently than MAC units. • CORDIC saves more hardware cost. • By the regularity, the CORDIC based architecture is very suitable for implementation with pipelined VLSI array processors. • The utility of the CORDIC based architecture lies in its generality and flexibility.