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Date: October 26, 2005. Clockless Chips. Presented by: K. Subrahmanya Sreshti. (05IT6004) School of Information Technology Indian Institute of Technology, Kharagpur. Presentation flow:. Introduction. Problems with synchronous circuits. Clockless / Asynchronous circuits.

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clockless chips

Date: October 26, 2005.

Clockless Chips

Presented by:

K. Subrahmanya Sreshti.

(05IT6004)

School of Information Technology

Indian Institute of Technology, Kharagpur

presentation flow
Presentation flow:
  • Introduction.
  • Problems with synchronous circuits.
  • Clockless / Asynchronous circuits.
  • How clockless chips work?
  • Simplicity in design.
  • Applications.
  • Applications (technical perspective).
  • Challenges.

Presentation on Clockless Chips

introduction
Introduction.
  • Struggle for the improvement in the microprocessor’s performance/functioning.
    • Pipelining
    • (Simultaneous) Multi-threading
    • Clockless / Asynchronous logic

}Synchronous

Presentation on Clockless Chips

problems with synchronous approach
Problems with Synchronous Approach
  • Distributing the clock globally.
  • Wastage of energy.
  • Traverse the chip’s longest wires in one clock cycle.
  • Order of arrival of the signals is unimportant.
  • Clocks themselves consume lot of energy (~30%).

Presentation on Clockless Chips

synchronous circuit
Synchronous circuit
  • Longest path determines the minimum clock period.
  • Dissipation of energy for each clock cycle.
  • EMI is more in synchronous elements.

Presentation on Clockless Chips

clockless chips asynchronous logic circuits
Clockless chips (Asynchronous logic circuits)
  • Colckless chips/Asynchronous/self-timed circuits.
  • Functions away from the clock.
  • Different parts work at different speeds.
  • Hand-off the result immediately.

Presentation on Clockless Chips

clock time cycle vs clockless time cycle
Clock time cycle vs. clockless time cycle

Courtesy: Fulcrum Microsystems.

Presentation on Clockless Chips

courtesy computers without clocks ivan e sutherland and jo ebergen
Courtesy: Computers without clocks – Ivan E Sutherland and Jo Ebergen

Presentation on Clockless Chips

how do they work
How do they work?
  • No pure asynchronous chips are available.
  • Uses handshake signals for the data exchange.
  • Data moves only when required, not always.
    • Minimizes power consumption.
    • Less EMI  less noise  more applications.
    • Stream data applications.

Presentation on Clockless Chips

simple and efficient design
Simple and efficient design
  • No centralized clock required.
  • Standardized components can be used.

Presentation on Clockless Chips

some features
Some features
  • Integrated pipelining mode.
    • Domino logic.
    • Delay – insensitive.
  • Two different implementation details
    • Dual rail.
    • Bundled data.

Presentation on Clockless Chips

advantages
Advantages
  • Works at its average speed.
  • Low power consumption.
    • Twice life-time.
  • Less heat generated.

 Good to mobile devices.

  • Less EMI  less noise  more applications.
  • Smart cards (due to asynchronous nature).

Presentation on Clockless Chips

advantages technical look
Advantages (technical look)
  • Asynchronous for higher performance:
    • Data-dependent delays.
    • All carry bits need to be computed.

Presentation on Clockless Chips

advantages technical look1
Advantages (technical look)…
  • Asynchronous for low power:
    • Consumes power only when and where active.
    • Rest of the time returns to a non-dissipating state, until next activation.
    • Illustrated through frequency divider

Presentation on Clockless Chips

advantages technical look2
Advantages (technical look)…
  • Asynchronous for low power:
    • Almost fixed power dissipation is achieved.
    • Many applications such as:
      • Infrared communication receiver.
      • Filter bank for digital hearing.
      • In pagers.
      • Double battery life.

Presentation on Clockless Chips

advantages technical look3
Advantages (technical look)…
  • Asynchronous for low noise and low emission:
    • Digital sub-circuits
      • Generates voltage noise (on power lines)
      • Induces current on silicon substrate.
      • Emits electromagnetic radiation at its clock frequency or its harmonics.

Presentation on Clockless Chips

advantages technical look4
Advantages (technical look)…
  • Heterogeneous Timing:
    • Gate delays.
    • Interconnection delays.
    • Heterogeneous systems would increase the delays in the circuits.

Presentation on Clockless Chips

challenges
Challenges
  • Interfacing between synchronous and asynchronous
    • Many devices available now are synchronous in nature.
    • Special circuits are needed to align them.
  • Lack of expertise.
  • Lack of tools.
  • Engineers are not trained in these fields.
  • Academically, no courses available.

Presentation on Clockless Chips

references
References
  • Scanning the Technology: Applications of Asynchronous Circuits – C. H. (Kees) van Berkel, Mark B. Josephs, and Steven M. Nowick
  • Computers without clocks – Ivan E Sutherland and Jo Ebergen.
  • http://ieeexplore.ieee.org/iel5/2/30617/01413111.pdf(October 2001)
  • http://csdl2.computer.org/comp/mags/dt/2003/06/d6005.pdf
  • http://www1.cs.columbia.edu/async/misc/technologyreview_oct_01_2001.html
  • http://www.technologyreview.com/articles/01/10/tristram1001.asp
  • http://www1.cs.columbia.edu/async/misc/economist/Economist_com.htm

Presentation on Clockless Chips

thank you
Thank you

Presentation on Clockless Chips

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