Synchronous reactive communication generalization implementation and optimization
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Synchronous Reactive Communication: Generalization , Implementation, and Optimization. Guoqiang Gerald Wang PhD Candidate Committee in charge: Prof . Alberto Sangiovanni-Vincentelli , Chair Prof. Robert K. Brayton Prof. Zuojun Shen December 9, 2008. Outline.

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Synchronous reactive communication generalization implementation and optimization

Synchronous Reactive Communication: Generalization, Implementation, and Optimization

GuoqiangGerald Wang

PhD Candidate

Committee in charge:

Prof. Alberto Sangiovanni-Vincentelli, Chair

Prof. Robert K. Brayton

Prof. ZuojunShen

December 9, 2008


Outline
Outline

  • Background and previous work

  • Methodology and implementation framework

  • SR semantics preserving communication protocols

  • Protocol implementation under OSEK OS standard

  • Memory optimization under timing constraints

  • Automatic code generation

  • Conclusions

  • Background and previous work

  • Methodology and implementation framework

  • SR semantics preserving communication protocols

  • Protocol implementation under OSEK OS standard

  • Memory optimization under timing constraints

  • Automatic code generation

  • Conclusions


System level design
System-Level Design

  • On the edge of a revolution in the way electronic products are designed

    • Increasing design complexity

    • High product quality

    • Stronger market pressure

  • System-level design is the key to success

    • Start with the highest possible level of abstraction (e.g. control algorithm)

    • Establish properties at the right level

    • Use formal models

    • Leverage multiple scientific disciplines

Background


Models of computation
Models of Computation

  • Process Networks (PN)

  • Undecidable: deadlocks and buffer boundedness

  • Synchronous Reactive (SR)

    • WRT model time

      • computation doesn’t take time

      • All actors execute simultaneously and instantaneously

    • Has strong formal properties: decidable termination & boundedness

    • Good for specifying periodic real-time tasks

  • Discrete Event (DE)

    • Signals are time-stamped events

    • Events are processed in chronological order

    • Good for modeling and design of time-based systems

  • Dataflow process networks

    • Dataflow processes are Kahn processes composed of atomic firings

  • Background


    Implementation tools
    Implementation Tools

    • Academia:

      • MetroPolis (ASV, UCB)

        • Meta model

        • Communication refinement

      • Ptolemy (E. Lee, UCB)

        • Started with static dataflow for DSP

        • Mixed model verification

    • Industry:

      • LabVIEW

        • Statically schedulable dataflow (Synchronous dataflow)

      • Simulink

        • Synchronous reactive

    Support multiple models of computation

    Background


    Model based design
    Model-Based Design

    • An instance of system-level design

    • Very popular

      • Tool support

        • Design time simulation/verification

      • Short development cycle

      • Predictable performance

      • Flexibility of new design evaluation

      • Design reuse

    • The rest of the presentation

      • Synchronous reactive model-based design

    Background


    Sr semantics
    SR Semantics

    Donald, I am

    sending $5

    and an apple.

    Get $5 and an apple.

    Thanks, Mickey!

    My turn to run!

    Now I am done.

    Time for

    me to run

    I finished.

    $5

    prioritym > priorityd

    periodm < periodd

    Simulation time

    t0

    t1

    During simulation, writer and reader respond instantaneously (computation takes zero time)

    Background


    Implementation options of multi rate systems

    base rate

    time

    0

    2

    8

    16

    Task 1

    time

    0

    2

    8

    16

    Task 2

    time

    0

    2

    8

    16

    Implementation Options of Multi-Rate systems

    • Single-task option

    • Multiple-task option

    unschedulable

    -> 6.1

    Background


    Model implementation case i
    Model Implementation (Case I)

    I need to

    yield to Mickey.

    Donald, I send

    $1 and a banana

    this time.

    Now, I

    can start.

    Time for me

    to run again.

    Now I

    am done.

    I can resume.

    My turn to

    run. But need

    to wait.

    Start receiving.

    Now I am

    done.

    Get $1 and

    a banana.

    Donald, I am

    sending $5

    and an apple.

    $1

    $5

    I finished.

    Time for

    me to run

    real time

    prioritym> priorityd

    periodm< periodd

    t0

    t1

    t2

    t3

    t4

    t5

    Communication is not atomic

    Uni-processor and priority-based preemptive scheduling

    Background


    Model implementation case ii
    Model Implementation (Case II)

    Start receiving.

    Got $5!

    Not finished yet.

    Have to yield.

    Donald, I send

    $1 and a banana

    this time.

    Now, I

    can start.

    Time for me

    to run again.

    Now I

    am done.

    My turn to

    run. But need

    to wait.

    Resume receiving.

    Now I am

    done.

    A banana. Wow,

    $5 and a banana!!

    Donald, I am

    sending $5

    and an apple.

    $1

    $5

    I finished.

    Time for

    me to run

    real time

    t0

    t1

    t2

    t3

    t4

    t5

    Background


    What is the difference
    What Is the Difference

    $5

    SR Semantics

    simulation time

    $5

    $5

    $1

    data

    determinism

    problem

    real time

    Case I

    $1

    first

    second

    $1

    $5

    data

    integrity

    problem

    Case II

    real time

    $5

    Background


    Current approach limitations and solutions
    Current Approach Limitations and Solutions

    • Rate transition buffering scheme from The MathWorks

    • Limitations

      • One to one communication

        • Double buffering scheme

        • No memory optimization

      • For periodic communicating tasks:

        • Periods must be harmonic

        • Tasks must be activated with the same phase

    • Solutions

      • One to many communication

        • Dynamic buffering and temporal currency control protocols

      • For periodic communicating tasks:

        • Raise the implementation up to the kernel level

    • Furthermore,

      • Generalization with support of arbitrary link delay and multiple activations per task

      • Memory optimization through automatic protocol selection

    Background


    Outline1
    Outline

    • Background and previous work

    • Methodology and implementation framework

    • SR semantics preserving communication protocols

    • Protocol implementation under OSEK OS standard

    • Memory optimization under timing constraints

    • Automatic code generation

    • Conclusions


    Methodology
    Methodology

    • Platform-based design

      • Automatic generation of

        • application tasks

        • communication protocol implementation

      • Automatic configuration of RTOS procedures and data structures

      • Flexibility of choice of RTOS API standard

    Methodology


    Meet in the middle approach
    Meet-in-the-Middle Approach

    Application Functional Model

    • Application domain

      • Time-critical applications

      • Modeled as SR tasks

    • Platform

      • Task/resource model platform

        • Task’s characteristics and interaction

      • RTOS platform

        • Priority-based scheduling policies

        • Inter-task comm. protocols

          • lock-based, lock-free, wait-free

    • Middle meeting point

      • RTOS API

        • OSEK/VDX, POSIX, μITRON

    • Execution architecture

      • Uni-processor

      • Priority-based preemptive scheduling

    Task Model; Communication Resource Model

    Mapping

    RTOS API

    Export

    Scheduling Policy: FP, DP; Communication Resource Management Policy

    Execution Architecture

    Methodology


    Design flow
    Design Flow

    Specification of SR models

    Model-based design tool

    Application

    configuration files

    (OIL)

    C code

    OSEK OS

    Kernel

    OSEK COM

    System Generator

    (SG)

    Files produced by SG

    User’s

    source

    code

    C code

    C code

    compiler

    linker

    Object libraries

    Executable file

    Methodology


    Task model i

    τi

    ·

    ·

    ·

    ·

    NIP

    NOP

    ·

    ·

    Task Model τi

    • Parameter characterization

      • Priority:

      • Period:

      • Activation time:

      • Start time:

      • Worst-case computation time:

      • Finish time:

      • Worst-case response time:

      • Relative deadline:

    time

    Methodology


    Outline2
    Outline

    • Background and previous work

    • Methodology and implementation framework

    • SR semantics preserving communication protocols

    • Protocol implementation under OSEK OS standard

    • Memory optimization under timing constraints

    • Automatic Code Generation

    • Conclusions


    Sr semantics with link delay
    SR Semantics with Link Delay

    j

    ri

    time

    in

    out

    w

    ···

    time

    SR Protocols


    One to many communication single writer multiple reader
    One to Many Communication: Single-Writer Multiple-Reader

    • General case: and

    • Special case: and

    HPR:

    ···

    ···

    Link delay: design parameter

    ···

    LPR:

    ···

    SR Protocols


    Sr semantics preserving communication mechanisms
    SR Semantics Preserving Communication mechanisms

    • Wait-free scheme

    • Buffer sizing mechanisms

      • Spatially-out-of-order writes

      • Spatially-in-order writes

    • Buffer indexing protocols

      • Dynamic Buffering Protocol (DBP)

      • Temporal Concurrency Control Protocol (TCCP)

    SR Protocols


    Spatially out of order writes

    LPR

    HPR

    Spatially-out-of-Order Writes

    • Buffer sizing:

    Buf[]

    Read[]

    prev

    0

    2

    0

    0

    5

    5

    1

    cur

    1

    1

    0

    1

    2

    2

    3

    4

    3

    3

    4

    4

    2

    5

    2

    5

    2

    6

    SR Protocols


    Spatially in order writes
    Spatially-in-Order Writes

    • Offset

    • Buffer sizing

    I finished.

    activated

    Unit

    delay

    buffer index

    writer instance

    SR Protocols


    How to guarantee sr semantics
    How to Guarantee SR Semantics

    • Handle communication at two levels

      • Buffer indices defined at activation time by kernel

      • Data reading/writing at execution time by application tasks

    SR Protocols


    The protocols
    The Protocols

    FreeHd

    2

    3

    0

    4

    1

    1

    2

    1

    3

    5

    4

    -1

    5

    UseFreeL[6]

    SR Protocols


    Outline3
    Outline

    • Background and previous work

    • Methodology and implementation framework

    • SR semantics preserving communication protocols

    • Protocol implementation under OSEK OS standard

    • Memory optimization under timing constraints

    • Automatic code generation

    • Conclusions


    Osek vdx
    OSEK/VDX

    • A series of standards particularly for automotive designs

    • Basic and extended tasks

    • Four Conformance Classes

      • BCC1, BCC2, ECC1, ECC2

    • Portability

      • Minimum requirement of CC

    • Kernel services:

      • Task management, alarm, hook mechanism

    • OIL

      • Modular configuration for system generation

    OSEK Implementation


    An osek vdx implementation

    DispHd

    size

    tick

    TickL[LCMR]

    DispT[TSize]

    An OSEK/VDX Implementation

    • Portable implementation

      • BCC1

      • Minimum Requirement

        • Only one alarm

    • Task dispatcher

      • GCD of rates

    OSEK Implementation


    Implementation cont
    Implementation (cont)

    • Application task

    OSEK Implementation


    Comparison of ctdbp tccp
    Comparison of CTDBP & TCCP

    OSEK Implementation


    Outline4
    Outline

    • Background and previous work

    • Methodology and implementation framework

    • SR semantics preserving communication protocols

    • Protocol implementation under OSEK OS standard

    • Memory optimization under timing constraints

    • Automatic code generation

    • Conclusions


    Mathematical formulation
    Mathematical Formulation

    • Fixed given priority

      • Parameters:

      • Variables:

    Buffer sizing mechanisms:

    Optimization


    Complete formulation
    Complete Formulation

    Reformulate: MILP

    Schedulability constraint

    Buffer size

    Lifetime

    WCRT

    Protocol flag

    Partial cost of dispatcher

    Cost of context switches

    Optimization


    Experimental setup
    Experimental Setup

    • Performance evaluation environment

      • PIC18F452

        • Performance up to 10 MIPS

      • ePICos18

        • Multi-task, preemptive, O(1) kernel scheduler

        • OSEK compliant

    • Task graphs generated by TGFF

      • 809 systems (158 unschedulable)

        • On average, 12 tasks/graph; execution time: 6•104ICs; task period: 106ICs

        • ≤ 4(8) writers(readers)/task; ≤ 2-unit delay;

    Optimization


    Experimental results
    Experimental Results

    4.8%

    14%

    24%

    Optimization


    Outline5
    Outline

    • Background and previous work

    • Methodology and implementation framework

    • SR semantics preserving communication protocols

    • Protocol implementation under OSEK OS standard

    • Memory optimization under timing constraints

    • Automatic code generation

    • Conclusions


    Real time workshop
    Real-Time Workshop

    • Simulink system functions (S-Functions)

      • Extend capability of Simulink environment

      • Coded in C or MATLAB

    • Target Language Compiler (TLC)

      • From graphical model to intermediate form

      • Eventually into target specific code

    • RTW Embedded Coder (E-Coder)

      • Framework for development of embedded software

    Code Generation


    Sr implementation library
    SR Implementation Library

    Code Generation


    Example of dyb
    Example of DyB

    Given:

    sampling rates,

    buffer initial value (8)

    Period of task dispatcher?

    How many buffer slots?

    How many tasks?

    GCD(2,3,5) = 1

    NLPR + 1 + 1 = 3

    5

    Code Generation


    Simulation emulation results
    Simulation/Emulation Results

    RTW

    MPLAB(PIC18F452) + ePICos18

    Period = 3

    Period = 5

    Period = 2

    Code Generation


    Conclusions
    Conclusions

    • Generalized theory on SR semantics preserving communication

    • Implemented protocols with portability consideration under the OSEK OS standard

    • Optimized memory and supported a wider range of applications under timing constraints with automatic protocol selection

    • Supported automatic code generation for SR communication protocols



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