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Calibration of CFT Detector

Calibration of CFT Detector. Download trigger (in taker, under Modify: Free Trigger & Change Trigger) each time you start calibration run.

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Calibration of CFT Detector

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  1. Calibration of CFT Detector • Download trigger (in taker, under Modify: Free Trigger & Change Trigger) each time you start calibration run. • After calibration you will return CFT crates to global run and check histograms from ft_examine. Do also ‘Checklist Between Stores’ to save histograms. Read hit map analysis in the Checklist. You should have zero of hot and cold modules and tripts. • Also re-start cft_gui at Tracking station

  2. Calibration of CFT Detectorhttp://d0server1.fnal.gov/users/warchol/ • Content Page • Calibration in brief………………………………………………………………….3 Calibration of discriminators …………………………………………...…………9 • Aligning pedestals ……………………………………………………………… 27 • Calibration of Time ………………………………………………………………..28 • Calibration of Analogue Thresholds …………………………………..……...31 • Patching when calibration constants do not make to database……...……….50 • Using Old Calibration Run ………………………………………………………. 55 • Preparing for global run…………………………………………………………...56 • Power cycling and insertion of new AFEII boards……..……………………….57 • Looking at data……………………………………………………………………. 60 • Transferring calibration to off-line database…………………………...………..64 • CPS MIP calibration……………………………………………………………….69 • About Charge Inject ………………………………………………………………73

  3. Calibration in Brief • Ask DAQ shifter to take crates 0x50, 0x51, 0x52, 0x53 and 0x13 out of global run • Calibrate discriminator thresholds for crates 0x50, 0x51, 0x52 and spare boards in 0x53. • Set parameters and download • Take data • Transfer calibration results from calibration tables to electronic tables • SDAQ run (with ITC option asserted) will put calibration constants into calibration tables • cft_gui uses electronic tables, therefore one needs to transfer calibration constants from calibration tables to electronic tables • Check the quality of calibration run • Calibrate time, not needed for crate 0x53 • Align pedestals-this only after you installed new board • Calibrate analogue thresholds • write peds_zero Thrs to afpga • Set run parameters and download • Take data • Transfer calibration results from calibration tables to electronic tables • Check the quality of calibration run • thrsToAfpga • Download for global bias running • Before re-turning crates to global run download all crates (click on download in cft_gui for each crate) • Calibration of analog thresholds has to be last step because analog thresholds may depend discriminator thresholds. • After installation of new board you have to calibrate discriminator thresholds (except of crate 0x53) and analogue thresholds. Do time calibration and align pedestal as soon as you can. Alignment of pedestals has to be followed by calibration of analogue thresholds.

  4. Calibration in BriefWhen to make calibration • You need to make new calibration when: • New board was installed • Hit maps show “hot” regions and/or depleted regions • It usually takes three hrs to make full CFT calibration. Calibration depends on the temperature of AFE boards therefore it should be done when temperature is stable (archiver enables you to check that). Discriminator calibration needs to be done when there is no beam in the accelerator. Time calibration can be done with beam in the accelerator. Calibration of analog thresholds can be done with the beam in the accelerator, however you need to check that beam is not detected by CFT. To check if beam is detected by CFT look at pulse height distributions in layers closest to the beam: for example boards 5A6&A7, 3A2&3. I did often calibrate analog thresholds during proton injection tune-up.

  5. Calibration in Brief • Go to DAQ shifter and ask to remove from the run CFT/PS crates, and crate 0x13.: • Verify that crates are re-moved (check via monitor) including sequencer crates 3 and 5. • Discriminator scan: • Participating crates: 0x50, 0x51,0x52, 0x53 (SPARE_VRB only) • Disable non-participating VRBs in 0x53 • Set Parameters • Vthres not selected • nsteps_v_thres 0x20 • v_thres2 = 0xd7 • disc_occ_fac 0xa • download • Take data (“Free Trigger”, “Change Trigger”), takes about 1 hr. • check database, new vthres, plot VrefVthres, plot Vthres change • download Tript vthres • Re-enable VRBs in 0x53 • Time calibration • Thresholds for Analog Signals • Set Parameter • nevents_noise 100.0 • All crates participate • Set Parameters • write peds_zeroThrs to afpga • download • Take data (“Free Trigger”, “Change Trigger”), takes about 10 min. Check pulse height distributions for AFE 5A6 (VRB-5210) , or AFE 3A2 (VRB-5110) for beam interactions (presence of counts well above pedestals), might take another run. • check database, new thresholds, plot thresholds change • thrsToAfpga • Prepare for physics run • Free Trigger in Taker • download

  6. SDAQ Parameters for Calibration of Discriminators • Click Modify database • Notice • nsteps_v_thres 0x20 • v_thres2 0xd7 • nevents_sift_hits 0x3e8 • disc_occ_fac 0xa • cts_type_run 0x0 • run_number 100.0 • calinj_time_nstep 0 • calinj_bits_nset 0 • Vthres not selected • Itc selected • For tests with discriminator noise • of 5% set disc_occ_fac x32

  7. SADQ parameters for Calibration of Thresholds for Analog Signals • Click Modify database • Notice: • nevents_peds 10000.0 • nevents_noise 100.0 • nsteps_v_thres 0x0 • nevents_sift_hits 0x0 • run_number 100.0 • calinj_time_nstep 0x0 • calinj_bits_nset 0x0 • Itc selected • For tests with 20 % noise set • nevents_noise 2000.0

  8. SDAQ parameters for Time Calibration • Notice:nsteps_v_thres 0x0 • calinj_time_nstep 0x3 • injtime1,2,3 0x0,0x2,0x4 • calinj_q 0xf • calinj_xing 0x3e (0x18 at cts) • calinj_bits_nset 0x8 • injbit_set1, 8: 0x1, 0x2, … 0x8 • Itc not selected q, injected charge is f=1111 One trip injected charge, another trip injected charge 1111=f , large charge to both 0101=5, small charge to both 1010=a, medium charge to both Histograms to look: AFE Hit Map Pedestal Means vs VREF (contain time distributions for each channel)

  9. Calibration of DiscriminatorsCheck That Temperature Control is Running • If you do this calibration because you just swapped AFE board, you might choose to calibrate only boards readout by VRB which reads out swapped board. Remember that discriminator calibration can always go wrong, so if you have little time do not calibrate full CFT/crate. • Click plot cryo for VRBCR_50 • Examine cryo plot to see if temperature stable

  10. Calibration of Discriminators • Go to DAQ shifter and ask to remove from the run the follwing crates: • All cft crates: 0x50, 0x51, 0x52, 0x53 ( CFT/PS) • Crate 0x13 (L1) • Verify that crates are re-moved (check via monitor) including sequencer crates 3 and 5. • Verify that accelerator status and alarm conditions are appropriate for calibration. • For each crate write peds_zeroThrs to afpga

  11. Calibration of DiscriminatoresSetting Parameters for Calibration • Click global parameter • Click SDAQ Parameter

  12. Calibration of DiscriminatorsSetting Parameters • Set Parameters • Click Modify database • Notice • nsteps_v_thres 0x20 • v_thres2 0xd7 • nevents_sift_hits 0x3e8 • disc_occ_fac 0xa • cts_type_run 0x0 • run_number 100.0 • calinj_time_nstep 0x0 • calinj_bits_nset 0x0 • Vthres not selected • itc selected • For tests with discriminator noise • of 5% set disc_occ_fac x32

  13. Calibration of Discriminators • In crate 0x53 only last SPARE_VRB 5315 participates in discriminator calibration

  14. Calibration of DiscriminatorsDownloading • Click download for VRBCR_50 • Click download for VRBCR_51 • Click download for VRBCR_52 • Click download for VRBCR_53 • Wait until download buttons turn green

  15. Calibration of DiscriminatorsTaking Data • Go to screen numbered 10 (ioc xterms taker) in CFT Console Crib Sheet. • You should find there 4 terminals to ioc’s (ioc stands for input output controller) in VME crates 0x50 to 0x53. Calibration is run on these computers and you need to watch terminals for error messages. Prompt is -> and you can type pwd to get the identification. • d0olctl94 is ioc in crate ox50 • d0olctl95 is ioc in crate 0x51 • d0olctl96 is ioc in crate ox52 • d0olcfl97 is ioc in crate 0x53 • If terminals are missing you can start them by typing: telnet t-d0-mch2 2017, 2020, as shown below

  16. Calibration of DiscriminatorsTaking Data • Stay in screen numbered 10 (ioc xterms taker) in CFT Console Crib Sheet • Start taker • setup d0online • taker • Click on Modify • Click on Free Trigger-ifallowed • Click on Change Trigger

  17. Calibration of DiscriminatorsChoosing Configuration File for Taker • Choose the configuration file for the taker • Select Calibration • Select cft

  18. Calibration of DiscriminatorsChoose Configuration File for Taker • Choose • calib-all-1.1 • Click OK • Verify download is successful (as reported in taker window)

  19. Calibration of DiscriminatorsTaking Data • Click on Start in taker window. • Write calibration in Comment field. • Start button will change to Stop. • Watch DAQ monitor. • Watch ioc terminals for errors. • If you see the following error messages : • Stop run by clicking on Stop in taker window • Re-download the crate • Go back to first page of Taking data (remeber: Free Trigger, Change Trigger in Taker)

  20. Calibration of DiscriminatorsTaking data • Check DAQ monitor and rate should be ~30 Hz, 0x50 should be 90 % L1 busy • Write in e-Log calibration run number • Do not worry about occasional messages like: • Wait until Stop button will turn to Start in taker window

  21. Calibration of DiscriminatorsTransferring data to electronics database • Left click on VRBCR_50 (reached from cft_gui after clicking on details). • Click on check database to see if data got to CFT calibration tables in database, if not, wait and click again until data are in database • Click on new vthres (this transfers data from CFT calibration tables to electronics ‘ tables used by cft_gui to download electronics, CPS modules are skipped) • Right click on menu to get rid of menu.

  22. Calibration of DiscriminatorsChecking the quality of Calibration runChecking Calibration Data In Database • Clicking on plot Vthres change will display the change of discriminator thresholds as compared to discriminator thresholds in previous calibration run • Document in e-Log if changes >5

  23. Calibration of DiscriminatorsChecking the quality of Calibration runChecking Calibration Data In Database • Click on plot VrefVthres. • Look carefully for dips like you see on plot below in 8A2 and 9A1. These dips mean that calibration failed in boards 8A2 and 9A1. You might look at cft_sdaq plot “AFE Sift Disc Hit Map”. You will see that one module in those boards does not have discriminator hits. • You need to re-calibrate those boards. I usually re-calibrate boards readout by VRB reading out failed board. • Spike on the bottom plot of previous page indicates problem in calibration (of reference calibration in this case). • Dip at 9A7 is okay, caused by few unresponsive VLPCs/

  24. Calibration of DiscriminatorsTransferring data to electronics database • Click on download Tript vthres

  25. Do steps in pages 21-24 for each crate • Re-enable disabled boards in 0x53 • For each crate: thresToAfpga

  26. Checking the Quality of Calibration Runcft_sdaq is examine for sdaq run • This is optional: • setup d0online • cft_sdaq • username: • password:

  27. Aligning pedestals • This is done rarely. If you swapped board you need to do it, but it does not have to be done before the first store with new board. • The values to which pedestals will be aligned in calibration run are hard coded in smt_device_2afe.py in the following lines: • AFE2PED=8 (for cps) • AFE2PEDFT=45 • AFE2PEDFPS=10 (for fps) • The procedure for alignment of pedestals is following: • Decrease bias by 0.4 V • a) Set bias_offset to –0.4 ( reachable via global parameter->SVX Parameter) • b) From VRBCR menu: update bias • c) From VRBCR menu: On bias • 2. FromVRBCR menu: zero peds_thrs in afpgas • Do analog thresholds calibration run (set SDAQ Parameters for analog thresholds calibration run, download crate, make run with the help of taker) • From VRBCR menu: • a) check database • b) new ft peds if you are calibrating cft : crate 50 • c) new ft peds , new cps peds if you are calibrating cps: crate 51, 52 • d) new fps peds if you are calibrating fps: crate 53 • From VRBCR menu: write peds_zeroThrs to afpga • Download standard bias, as in 1) but with bias_offset set to 0.0 • Do analog thresholds calibration run (set SDAQ Parameters for analog thresholds calibration run, download crate, make run with the help of taker) • From VRBCR menu: check database, new thresholds • From VRBCR menu: write peds_thrs to afpga • Restore bias by setting bias_offset to 0.0V, update bias, On bias • You can write constant value to cft and fps pedestals in database by clicking on update ft peds to AFE2_pedestal.x7f results in pedestals around 55.

  28. Calibration of Time, 3/10/10 • Time calibration does not have to be done before first store with newly swapped board. • The procedure is following: • 1. Decrease bias by 4.0 V • a) Set bias_offset to –4.0V (in SVX Parameter menu, reachable from global parameter button) • b) From VRBCR menu: update bias • c) From VRBCR menu: On bias • 2. From VRBCR menu: increase Tript vthresh, do this 7 times (at cts set discriminator thresholds to xdc=220) • 3. From VRBCR menu: download Tript vthres • With the help of AFE menu (global parameter->AFE Parameter->AFE2_threshold) set AFE2_threshold to xa0 (for cps threshold should be x12) • From VRBCR menu: write peds_AFE2thrs to afpga • Set parameters for sdaq run as shown on page 30 • Download crate by clicking on download in cft_gui • From VRBCR menu: set EPICS passive • CloseAFE monitoring script • Do sdaq run with the following settings: • a)trigger: led/led-0x • b)set appropriate registers in trigger framework for triggering on Xing 63. In the Register I/O Menu: Vertical Interconnect Master = 1, Vertical Interconnect Slave=2, Card Slot=21, Chip Address=16, Register Address=41, Write Data=60 (this is 3 less than the tick you want to select), decimal data format has to be selected, click Write button. • 9. Calibration file will be created with the following name: /projects/D0cft/commiss/sdaq/data/VRBCR_5xruny.qinj • Check the quality of calibration by looking at the following histograms: • a) AFE Hit Map. Look at all AFEs. Below is what you should see for cft and cps AFE boards. If Hit maps have structure, repeat the run and check again hit maps for all AFEs.

  29. Calibration of Time, 3/27/09 • b) Pedestal Means vs Vref. Ttitle is incorrect, these are time distributions, one plot per channel. Just look at few pixels. • To recover from Time Calibration do the following: • From VRBCR menu: reset after charge inject • From VRBCR menu: set EPICS scan • Restart AFE monitoring: start_daq afe_monitor • 4. Download standard bias, as in 1) on previous page, but with bias_offset set to 0.0 • 5. From VRBCR menu: decrease Tript vthresh, do this 7 times • 6. From VRBCR menu: update cps disc thres-not needed for crate 0x50 • 7. Quit and restart cft_gui-not needed for crate 0x50 • 8. From VRBCR menu: download Tript vthres • 9. From VRBCR menu: write peds_thrs to afpga • In order for ft_examine to use new time calibration do the following: • cd /online/examines/p20.11.01/ft_examine/cft_unpdata/peds • cp /projects/D0cft/commiss/sdaq/data/VRBCR_xruny.qinj . • cd ../rcp • edit in CftCalibData_nodb.rcp line: int TCalibRunList with time calibration run numbers for crate 50, 51, 52 • re-start ft_examine

  30. SDAQ parameters for Time Calibration • Notice:nsteps_v_thres 0x0 • calinj_time_nstep 0x3 • injtime1,2,3 0x0,0x2,0x4 • calinj_q 0xf • calinj_xing 0x3e (0x18 at cts) • calinj_bits_nset 0x8 • injbit_set1, 8: 0x1, 0x2, … 0x8 • itc not selected q, injected charge is f=1111 One trip injected charge, another trip injected charge 1111=f , large charge to both 0101=5, small charge to both 1010=a, medium charge to both Histograms to look: AFE Hit Map Pedestal Means vs VREF (contain time distributions for each channel)

  31. Calibration of analogue Thresholds • This is a must after you swapped AFE board. • Go to DAQ shifter and ask to remove from the run the following crates: • All cft crates: 0x50, 0x51, 0x52, 0x53 ( CFT/PS) • Crate 0x13 (L1) • Verify that crates are re-moved (check via monitor) including sequencer crates 3 and 5. • Verify that that accelerator status and alarm conditions are appropriate for calibration.

  32. Calibration of analog thresholdsChecking Temperature • Click plot cryo for VRBCR_50, VRBCR_51, VRBCR_52 and VRBCR_53 • Check that temperature is stable

  33. Calibration of analog thresholdsSetting Parameters for Calibration • Click on global parameter • Click on SDAQ Parameter

  34. Calibration of analog thresholds Setting Parameters • Set Parameters: • Click Modify database • Notice: • nevents_peds 10000.0 • nevents_noise 100.0 • nsteps_v_thres 0x0 • nevents_sift_hits 0x0 • run_number 100.0 • calinj_time_nstep 0x0 • calinj_bits_nset 0x0 • itc selected • For tests with 20% noise set • nevents_noise 2000.0

  35. Calibration of analog thresholds AFEII boards • Click on write peds_zeroThrs to afpga.

  36. Calibration of analog thresholds Downloading • Click download for appropriate crate(s) VRBCR_50, VRBCR_51, VRBCR_52, VRBCR_53 • Wait until download buttons turn green

  37. Calibration of analog thresholdsTaking Data • Go to screen numbered 10 (ioc xterms taker) in CFT Console Crib Sheet. • You should find there 4 terminals to ioc’s (ioc stands for input output controller) in VME crates 0x50 to 0x53. Calibration is run on these computers and you need to watch terminals for error messages. Prompt is -> and you can type pwd to get the identification. • d0olctl94 is ioc in crate ox50 • d0olctl95 is ioc in crate 0x51 • d0olctl96 is ioc in crate ox52 • d0olcfl97 is ioc in crate 0x53 • If terminals are missing you can start them by typing: telnet t-d0-mch2 2017, 2020, as shown below

  38. Calibration of analog thresholdsTaking Data • Stay in screen numbered 10 (ioc xterms taker) in CFT Console Crib Sheet • Start taker (or use the one that is already started) • setup d0online • taker • Click on Modify • Click on Free Trigger-ifallowed • Click on Change Trigger

  39. Calibration of analog thresholdsChoosing Configuration File for Taker • Choose the configuration file for taker • Select Calibration • Select cft

  40. Calibration of analog thresholdsChoose Configuration File for Taker • Choose • calib-all-1.1 (if calibrating all CFT crates) or choose …. • Click OK • Verify download is successful (as reported in taker window)

  41. Calibration of analog thresholdsTaking Data • Click Start in taker window. • Write calibration in Comment” field. • Start button will change to Stop. • Watch DAQ monitor. • Watch ioc terminals for errors. • If you see the following error messages : • Stop run by clicking on Stop in taker window • Re-download the crate • Go back to first page of Taking data (remeber: Free Trigger, Change Trigger in Taker)

  42. Calibration of analog thresholdsTaking Data • Do not worry about occasional messages like:

  43. Calibration of analog thresholdsTaking data • Check DAQ monitor: Rate should be ~19 Hz, 99 % L1 busy • Write in e-Log calibration run number • There should not be any alarm during pedestal stage of calibration run • Wait until Stop button will turn to Start in taker window

  44. Calibration of analog thresholdsTransferring SVX thresholds to Electronic Database • For each crate that participated in calibration run: • Left click on VRBCR_x (reached from cft_gui after clicking on “details”). • Click on check database to see if data got to CFT calibration tables in database, if not, wait and click again until data are in database . • Click on new thresholds to transfer calibration to electronics’ tables in database • Click on plot thresholds change. • Click on write peds_thrs to afpga. • Right click on menu to get rid of menu.

  45. Calibration of analog thresholdsHow to compare current calibration values to the old ones For each crate: Click plot thresholds change

  46. Checking the quality of Calibration runChecking Calibration Data In Database • After clicking on plot thresholds change the display will show up: • Document in e-Log changes >5.

  47. Checking the Quality of Calibration Runcft_sdaq is examine for sdaq run • This is optional: • setup d0online • setup onl_cftcalib • cft_sdaq • username: • password:

  48. Calibration Constants on 21 November 08 • Boards with “ragged” SVX thresholds, like board 3A2, have 4 edge modules connected to CFT detector, and 4 middle modules connected to CPS detector

  49. Calibration Constants on 21 November 09 • Boards with “ragged” SVX thresholds, like board 4A2, have 4 edge modules connected to CFT detector, and 4 middle modules connected to CPS detector .

  50. Patching when calibration constants do not make to database • Calibration constants are transferred to database by Calibration Manager written by Taka Yasuda. We had instances when Calibration Manger fails to do that. When that happens we need to do that ourselves (calibration programs writes “flat” files with calibration constants). • Click on SDAQ Parameter.

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