week 6 timing generation and measurement
Download
Skip this Video
Download Presentation
Week #6 Timing Generation and Measurement

Loading in 2 Seconds...

play fullscreen
1 / 59

Week #6 Timing Generation and Measurement - PowerPoint PPT Presentation


  • 71 Views
  • Uploaded on

Week #6 Timing Generation and Measurement. ENG3640 Microcomputer Interfacing. Topics. Timer Module Input Capture Output Compare Pulse Accumulator Pulse Width Modulation. Resources. Huang, Chapter 8, Sections

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about ' Week #6 Timing Generation and Measurement' - inari


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
week 6 timing generation and measurement

Week #6 Timing Generation and Measurement

ENG3640 Microcomputer Interfacing

topics
Topics
  • Timer Module
    • Input Capture
    • Output Compare
    • Pulse Accumulator
    • Pulse Width Modulation

ENG3640 Fall 2012

resources
Resources
  • Huang, Chapter 8, Sections
    • 8.2 Why are Timer Functions Important?
    • 8.3 Standard Timer Module
    • 8.4 Timer Counter Register
    • 8.5 Input Capture Function
    • 8.6 Output Compare
    • 8.8 Pulse Accumulator
    • 8.10 Pulse Width Modulation

ENG3640 Fall 2012

slide4

1-KB SRAM

4-KB EEPROM

68HC812A4 Block Diagram

CPU12

Port T

Timer Module

ENG3640 Fall 2012

introduction
Introduction
  • Instruction timing (software) is indeterminate (on most processors) to achieve desired level of precision
  • The timer module is used to handle interfacing with time-precise events
    • pulse measurement
      • accelerometer
    • pulse counting
      • shaft rotation
    • pulse modulation
      • limb actuator

ENG3640 Fall 2012

slide6

Timer Block Diagram

Very Complicated! So we need to divide and conquer to understand the functionality of each sub-module.

ENG3640 Fall 2012

interrupt vectors
Interrupt Vectors

ENG3640 Fall 2012

basic workings
Basic Workings
  • The module clock, which is the system clock, at 8Mhz, increments a 16 bit counter called TCNT.
  • Eight channels use this as a reference.
    • 16 bit register
    • 16 bit comparator
  • Eight associated input/output pins for reading signals or creating waveforms.
  • Registers include channel and timer control registers

ENG3640 Fall 2012

i output compare module
(I) Output Compare Module
  • The OC pin is an output of the MCU, hence can be used to control an external device.
  • The output compare module can be used to
    • Create square waves
    • Generate pulses
    • Implement time delays
    • Execute periodic interrupts
    • Pulse Width Modulation

ENG3640 Fall 2012

basic components of output compare
Basic Components of Output Compare

TCNT

15

0

  • An output compare event occurs when either the 16-bit TCNT matches the 16-bit OC register or software writes a 1 to the FOC bit.
  • The OMn, OLn bits specify what effect the output compare event will have on the output pin.
  • The module is armed when the mask bit is 1.
  • The flag is set when the event occurs

OC reg

OCn

mask

flag

FOC

OMn

OLn

ENG3640 Fall 2012

output compare actions
Output Compare Actions
  • Each channel can be programmed to affect the output pin to toggle, go high, go low or do nothing

OM0

OL0

ENG3640 Fall 2012

basic principles of output compare
Basic Principles of Output Compare
  • Two or three actions result from an Output Compare  (TCNT = OC REG)
    • The OCn output bit changes.
    • The output compare flag is set
    • An interrupt is requested (only when mask is 1)

TCNT

OC reg

ENG3640 Fall 2012

output compare functional diagram
Output Compare: Functional Diagram

16-bit Comparator

OMn:OLn

ENG3640 Fall 2012

compare to tcnt
Compare to TCNT

OCxF

ENG3640 Fall 2012

a simple delay using output compare
A Simple Delay Using Output Compare
  • Let fixed be the number of cycles you wish to wait (i.e the delay).
  • The steps to create the delay are:
    • Read the current 16-bit TCNT
    • Calculate TCNT + fixed
    • Set the 16-bit output compare register to TCNT + fixed
    • Clear the output compare flag
    • Wait for the output compare flag to be set (polling or interrupt)

ENG3640 Fall 2012

output compare pwm
Output Compare: PWM
  • Pulse Width Modulation or Variable Duty Cycle Actuator is a technique used to control motors by controlling the amount of power supplied (varying the duty cycle)

Small

Middle

Large

ENG3640 Fall 2012

enabling using the oc module
Enabling/Using the OC Module
  • The first step to use the Output Compare Module is to set the bit ``TEN” in the TSCR to “1”. This allows the TCNT to increment.
    • TSWAI: When set to ‘1’ the TCNT stops in wait mode.
    • TSBCK: When set to `1` the TCNT stops in background mode.
    • TFFCA: (Timer fast flag clear all)

$0086

TSCR

TEN

TSWAI

TSBCK

TFFCA

0

0

0

0

ENG3640 Fall 2012

enabling using the oc module1
Enabling/Using the OC Module
  • The second step is to set the prescaler in TMSK2
    • This determines the rate by which TCNT counts

PR2

PR1

PR0

ENG3640 Fall 2012

enabling using the oc module2
Enabling/Using the OC Module
  • The third step is to select the pin on the timer PT0 .. PT7 as an output compare by placing a `1` in the corresponding bit of the TIOS register.
    • There is also a direction register DDRT, for Port T, which means we should set the corresponding bits for the output compare.
    • Make sure also to specify the action (toggle, set or reset) determined by Omx:OLx

$0080

TIOS

IOS7

IOS6

IOS5

IOS4

IOS3

IOS2

IOS1

IOS0

ENG3640 Fall 2012

enabling using the oc module3

$008E

TFLG1

C7F

C6F

C5F

C4F

C3F

C2F

C1F

C0F

Enabling/Using the OC Module
  • The fourth step is to write time you want event to occur to TCn register
    • To have event occur on Pin 4 when TCNT == 0x000: TC4 = 0x000;
    • To have next event occur on Pin 4 (500 cycles later):

TC4 = TC4 + 500;

    • When TCNT == TCn, the specified action will occur, and flag Cfn will be set.
    • To clear the flag, write a 1 to the bit you want to clear

ENG3640 Fall 2012

enabling using the oc module4

TMSK1

C7I

C6I

C5I

C4I

C3I

C2I

C1I

C0I

Enabling/Using the OC Module

The fifth step is to arm or disarm the output compare interrupts by initializing the TMSK1 register.

$008C

ENG3640 Fall 2012

square wave generation example
Square Wave Generation: Example
  • This example generates a 50% duty cycle square wave using output compare.
    • The output is high for Period cycles, then low for Period cycles.
    • Toggle mode is used to create the 50% duty cycle square wave.
    • In this mode, the output compare pin is toggled whenever the output compare latch matches TCNT.

6812 PT3/OC3

ENG3640 Fall 2012

square wave generation example1
Square Wave Generation: Example

; M68HC812A4. (Initialization routine)

Init sei ; disable interrupt (make atomic)

bset TIOS, $08 ; Selecting pin 3 as OC

bset DDRT, $08 ; PT3 output

movb #$80, TSCR ; enable timer (bit “TEN”)

movb #$32, TMSK2 ; 500 ns clk (prescalar)

bset TMSK1, $08 ; Arm OC3

bset TCTL2, $40 ; OL3 = 1

bclr TCTL2, $80 ; OM3 = 0 (Toggle output line)

movb #$08, TFLG1 ; clear Flag for OC3 (IMPORTANT)

ldd TCNT ; current time

addd #50 ; in 25 micro seconds

std TC3

cli ; enable interrupts

rts

ENG3640 Fall 2012

slide25

Square Wave Generation: ISR

; MC68HC812A4

OC3Han movb #$08, TFLG1 ; Ack [4]

ldd TC3 [3]

addd Period ; next [3]

std TC3 [2]

rti [8]

org $FFE8 ; timer channel 3

fdb OC3Han

ENG3640 Fall 2012

basic components of input capture
Basic Components of Input Capture

TCNT

15

0

  • The EDGnA, EDGnB specify whether the rising or falling, or both will trigger a capture event.
  • The module is armed when the mask bit is 1 (i.e. an interrupt will be requested on a capture event).
  • The flag bit is set when a capture event occurs.

IC reg

ICn

mask

flag

EdgnB

EdgnA

ENG3640 Fall 2012

basic principles of input capture
Basic Principles of Input Capture
  • Two or three actions result from a capture event
    • The current TCNT value is copied into the input capture register.
    • The input capture flag is set
    • An interrupt is requested (only when mask is 1)

TCNT

IC reg

ENG3640 Fall 2012

input capture functional block diagram
Input Capture: Functional Block Diagram

TCNT

TCn

EDGnA:EDGnB

ENG3640 Fall 2012

input capture control registers
Input Capture: Control Registers
  • Each channel can specify which edge to capture count on

EDG0B

EDG0A

ENG3640 Fall 2012

input capture actions
Input Capture Actions

ENG3640 Fall 2012

input capture applications
Input Capture: Applications
  • The input capture can be used in the following applications
    • Perform a rising edge capture, then a falling edge capture, subtract the two measurements and get pulse width

Pulse Width

  • The minimum pulse width for the input capture input is greater than two module clocks.

ENG3640 Fall 2012

input capture applications1
Input Capture: Applications
  • The input capture can also be used in the following applications
    • Perform two rising edge input captures and subtract the two measurements to get period.
    • The subtraction of Second – First remains valid even if the TCNT overflows and wraps around.

Period

First

Second

ENG3640 Fall 2012

enabling using the input capture module
Enabling/Using the Input Capture Module
  • The first step to use the Input Capture Module is to set the bit ``TEN” in the TSCR to “1”. This allows the TCNT to increment.
    • TSWAI: When set to ‘1’ the TCNT stops in wait mode.
    • TSBCK: When set to `1` the TCNT stops in background mode.
    • TFFCA: (Timer fast flag clear all)

$0086

TSCR

TEN

TSWAI

TSBCK

TFFCA

0

0

0

0

ENG3640 Fall 2012

enabling using ic clock source
Enabling/Using IC: Clock Source
  • The second step is to set the prescaler in TMSK2 Register.
    • The input to the timer module can be adjusted to produce different time bases (PR2, PR1, PR0)
    • TOI: Timer Overflow Interrupt Enable
    • TPU: Timer pull-up resistor enable (0  no pull-up on Port T input)
    • TDRB: Timer Drive Reduction (0  normal current)
    • TCRE: Timer counter reset enable (0  free running counter)

PR2

PR1

PR0

ENG3640 Fall 2012

enabling using the ic module
Enabling/Using the IC Module
  • The third step is to select the pin on the timer PT0 .. PT7 as an input capture by placing a `0` in the corresponding bit of the TIOS register.
    • There is also a direction register DDRT, for Port T, which means we should clear the corresponding bits for the input capture inputs.
    • Make sure also to specify the active edge using the TCTL3 and TCTL4 (discussed earlier).

$0080

TIOS

IOS7

IOS6

IOS5

IOS4

IOS3

IOS2

IOS1

IOS0

ENG3640 Fall 2012

enabling using the ic module1

$008E

TMSK1

TFLG1

C7I

C7F

C6I

C6F

C5I

C5F

C4I

C4F

C3I

C3F

C2I

C2F

C1I

C1F

C0I

C0F

Enabling/Using the IC Module

The fourth step is to arm or disarm the input capture interrupts by initializing the TMSK1 register.

$008C

  • Our software can determine if an input capture has occurred by reading the TFLG1 register.
  • The flags are cleared by writing a 1 to them.

ENG3640 Fall 2012

interrupt registers
Interrupt Registers

TOF

  • The timer overflow has a separate flag in TFLG2

ENG3640 Fall 2012

input signal conditioning
Input Signal Conditioning
  • An op-amp can serve as a signal converter, transforming a sine wave into a square wave that can then be measured
  • Could be used for period measurement.

ENG3640 Fall 2012

period measurement initialization
Period Measurement: Initialization

external signal to PT1/IC1

Period rmb 2 ; units 500 ns

First rmb 2 ; TCNT at first edge

Done rmb 1 ; set each rising

Init sei ; make atomic

bset TIOS, $02 ; PT1 = input capture

bset DDRT, $02 ; PT1 is input

movb #$80, TSCR ; enable timer (bit “TEN”)

movb #$32, TMSK2 ; 500 ns clk

ldaa TCTL4 ; read old value of programmable edge reg

anda #$F3 ; Clear EDG1B = 0

oraa #$04 ; Set EDG1A = 1

staa TCTL4 ; Program PT1 on rise of IC1

movw TCNT, FIRST ; init global var

clr Done

movb #$02, TFLG1 ; clear IC1F

bset TMSK1, $02 ; ARM IC1F

cli ; enable interrupts

rts

ENG3640 Fall 2012

period measurement isr
Period Measurement: ISR

; MC68HC812A4

IC1Han movb #$08, TFLG1 ; clear C3F [4]

ldd TC1 [3]

subd First [3]

std Period [3]

movw TC1, First [6]

movb #$FF, Done [4]

rti [8]

org $FFEC ; timer channel 1

fdb IC1Han

ENG3640 Fall 2012

smallest period
Smallest Period
  • To calculate the smallest period that can be handled by the assembly language input capture interrupt we have to find:
    • The time to process the interrupt
    • The time to execute the entire handler

ENG3640 Fall 2012

optoelectronic position motion detection
Optoelectronic Position/Motion Detection
  • In many cases the MCU uses input capture to monitor and control speed.
  • A common type of speed sensor is an encoder disk mounted on a shaft.
  • Disk is located between a slotted optical switch
  • When encoder disk rotates the switch outputs pulses
  • Eight pulses correspond to one disk revolution so pulse frequency is related to speed of revolution.

ENG3640 Fall 2012

slide43

Extra Slides

ENG3640 Fall 2012

timer module input capture and output compare
Timer Module: Input Capture and Output Compare
  • Input Capture: “captures the time at which an external event occurs”. Can be used to:
    • Generate interrupts and
    • Measure period or pulse width
    • Measure Frequency
  • Output Compare: “can generate a periodic pulse with a programmable polarity, duration, and frequency”. Can be used to:
    • Create periodic interrupts,
    • Generate: Pulses, Square waves

ENG3640 Fall 2012

issues overflow
Issues: Overflow
  • If the period is 8192 us, the IC1 interrupts will be requested every 16,384 cycles (assuming we increment TCNT every 500ns.)
  • The difference between TIC1 latch values will be 16384 = $4000.
  • This subtraction remains valid even if the TCNT overflows and wraps around in between IC1 interrupts.
  • $2000 – $E000  $4000
  • This method will not operate properly if the period is larger than 65,535 cycles, or 32,767 us.

ENG3640 Fall 2012

input frequency measurement frequency resolution
Input Frequency Measurement: Frequency Resolution
  • The frequency resolution, (delta f) is defined to be the smallest change in frequency that can be reliably measured by the system.
  • For the system to detect a change, the frequency must increase (or decrease) enough so that there is one more (or less) pulse during the fixed time interval.
  • Therefore, the frequency resolution is
  • delta f = 1/fixed time
  • So if we count pulses in 10-ms time interval, the frequency resolution is 100HZ.
  • The frequency would have to increase to 600 Hz or decrease to 400 Hz for the change to be detected.

ENG3640 Fall 2012

input pulse measurement
Input Pulse Measurement

ENG3640 Fall 2012

frequency measurement
Frequency Measurement
  • The direct measurement of frequency involves counting input pulses for a fixed amount of time.
  • The basic idea is to use
    • Input capture to count pulses
    • Output compare to create the fixed time interval.

ENG3640 Fall 2012

input frequency measurement
Input Frequency Measurement
  • We could initialize Input Capture to interrupt on every rising edge of input signal.
  • During the input capture handler, we could increment a Counter (at the beginning of our fixed time interval, the Counter is initialized to zero).
  • Counting the number of inputs capture during the time interval, you can calculate input frequency

f = counter/fixed time

ENG3640 Fall 2012

output compare 7 config registers
Output Compare 7 Config Registers
  • PT7/OC7 on the 6812 can be configured such that an output compare event on it will cause changes on some or all of the other output compare pins.

Setting OC7Mx bit configures TIMPORT pin to be output.

The value in OC7D  output pin when TC7 matches TCNT

  • Usage?
  • This can be used for synchronization, i.e. creating pulses that start together or end together.

ENG3640 Fall 2012

output compare 7 example
Output Compare 7 : Example

0

0

0

0

1

1

1

1

0

0

0

0

1

0

1

0

  • movb #$0F, OC7M
  • movb #$0A, OC7D
  • Will cause the timer to clear PT0 and PT2 and set PT1 and PT3 when a compare event occurs on Timer Channel 7.

ENG3640 Fall 2012

pulse accumulator
Pulse Accumulator
  • The pulse accumulator consists of a 16-bit counter that can be used to count events on PT7 or measure the time between events on PT7

ENG3640 Fall 2012

pulse accumulator vs input capture
Pulse Accumulator vs. Input Capture
  • The pulse accumulator is most useful as an event counter for high-speed signals.
  • The input capture can be used to count input events but the problem is the large CPU load required for high event rates.
  • When using the Pulse Accumulator, there is no CPU load while counting events.
  • The only limitation on the event rate is the Pulse Accumulator Pulse Width specification, which is typically close to the E-clock period.
  • Typical Applications: Monitoring tape position in VCR

ENG3640 Fall 2012

pulse accumulator control registers
Pulse Accumulator: Control Registers
  • The pulse accumulator is enabled by the PAEN bit in PACTL
  • The mode of the pulse accumulator is controlled by the PAMOD bit in the PACTL register
  • PAMOD = 0 Event Counting Mode
  • PAMOD = 1  Gated Time Mode

PAEN

PAMOD

PEDGE

ENG3640 Fall 2012

pulse accumulator in event counting mode
Pulse Accumulator in Event Counting Mode

PAOVI

PAOVF

16-bit counter

PAIF

PAI

PAEN = 1, PAMOD = 0

ENG3640 Fall 2012

pulse accumulator modes
Pulse Accumulator: Modes
  • Gated Time Accumulation Mode
    • PAMOD = 1, counter clock source  E-clock/64,
    • The signal on PT7 is used to enable the clock, so in effect the counter measures the length of the enable signal on PT7.
    • If PEDGE = 0, a one on the input enables counting.
    • If PEDGE = 1, a zero on the input enables counting.
    • The PAOVF flag is set when the pulse accumulator counter overflows.

ENG3640 Fall 2012

pwm module 8 bit mode
PWM Module, 8-Bit Mode
  • The M68HC12A4 MCU has an on-chip, pulse-width modulation (PWM) module that can generate up to four PWM signals with no CPU loading.
  • Once the PWM module is configured, the PWM signals are generated without software intervention except to change the duty cycle.
  • The PWM module can be configured as:
    • Four 8-bit PWM channels
    • Two 16-bit PWM channels
    • One 16-bit and Two 8-bit PWM channels.

ENG3640 Fall 2012

pulse accumulator modes1
Pulse Accumulator: Modes
  • Event Counter Mode
  • Gated-Time Accumulation Mode.
  • Event counter Mode
    • PAMOD = 0, counter clock source  PT7 input
    • Counts the number of rising or falling edges on the input depending on PEDGE bit (and PAOVF is set)
    • Overflow after 0xFFFF can generate an interrupt if PAI is set.

ENG3640 Fall 2012

ad