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KSZ8995M

inara
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KSZ8995M

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    2. Three Generations of KS8995

    3. Eliminate one Power Rail Requirement

    4. Enhanced Features Available on “A” parts Disable Auto-MDI/MDIX on all ports (via pin #1) Additional features now controlled via registers: Revision ID – 0x2 (not applicable to KS8995X) PHY power save mode on all ports Software Reset Force Link in the PHY (Fiber mode) Far end fault status detected (Fiber mode) New Diagnostic Features MAC Loop back – packet looped back at the MAC layer PHY Loop back – packet looped back at the PHY layer Remote loop back – packet loop back at the PHY layer PHY isolate prevents test data from being sent to the target port. It also sends out IDLE pattern to keep link alive.

    5. Transmit Polarity Differences

    8. Recommendations Compatibility Enhanced “A” version is 100% free of bugs and no errata is necessary Enhanced “A” version is 100% backward compatible to the original KS8995X/M However, the original KS8995X/M are not 100% compatible with Enhanced “A” version designs. All new designs Use Enhanced “A” silicon All existing designs Customer can make the decision to upgrade To take advantage of two power supplies and new features, it is highly recommended to qualify the enhanced “A silicon No driver and hardware changes required (except KS8995M PHY ID)

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