Presented by: Reshef Schreiber Itay Leibovitz

1. Serial Communication Daughter Board for the DSP C6711 Evaluation Board Part A Final DR Presented by: Reshef Schreiber Itay Leibovitz Instructed by: Eran Segev

2. Project Objectives • Hardware • Board development: sits on TI’s DSP evaluation board. • Software • Drivers development: using the DSP as our CPU

3. HARDWARE

4. Board Objectives • The Serial Communication Board (SCB) enables the DSP developer to interface to the commercial DSP evaluation board using USB common serial channels and by that expanding its I/O capabilities • The SCB interfaces mechanically and electrically to the External Memory Interface (EMIF) connectors of the evaluation board

5. DSP Evaluation Board

6. SCB Interface SCB Power 3.3 V USB External Memory Interface (EMIF) Interrupts

7. DLP – USB245Mfeatures • Protocol is handled automatically within the module • 384 byte FIFO Transmit buffer / 128 byte FIFO receive buffer for high data throughput • Send / Receive Data over USB at up to 1 M Bytes / sec • Integrated 6MHZ – 48MHZ clock multiplier PLL • USB 1.1 and USB 2.0 compatible

8. USB Read Cycle • When RXF# is low, at least 1 byte is present in the FIFO’s • 128- byte receive buffer and is ready to be read with RD. RXF# • goes high when the receive buffer is empty

9. USB Write Cycle • When TXE# is high, the FIFO’s 385 byte transmit buffer is • full, or busy storing the last byte written.

10. EMIF • The memory signals required for the daughter-card interface connectors are: • Address pins • 7 address signals of the DSP are provided to give the address space to the daughtercard. • Data pins • 8 data signals are provided to facilitate access to memory and parallel peripherals. • Chip Select • CE2 is provided to access individual memory and I/O space. • Byte Enable • BE0 is used in order to access the first byte in a 32bit word .

11. SCB block diagram Evaluation Board Interface (FPGA) USB_RD USB Module External Memory Interface (EMIF) USB_WR Data TXE Interrupts RXF Data Bus

12. FPGA block diagram EAD(6:0) USB_CS Address Decoder USB_RD CE2 USB_WR BE0 Select AWE Reg_CS ARE TXE Data_Out Mux Test Register RXF BOARD_ID Reset_Out Sleep VCC_Out Data out Data Bus

13. FPGA Functions • Address decoding for three peripherals : • The USB module (R/W) • Controls buffer (Read only) • Test register (R/W) • Generating USB read and write cycles • The Test register is used to verify that the SCB is present and functioning • The Controls Buffer enable polling of the USB control signals (TXE,RXF)

14. The Controls Buffer Reset Out * VCC Out * BOARDID * 0 0 Sleep * RXF TXE * Not used functionally

15. USB_CNT Entity ARE AWE Chip Select Decoder USB Controls Logic EAD(6:0) Cnt_CS USB_RD BE0 USB_CS USB_WR Reg_CS CE2

16. Memory Map EMIF Address D(31:24) D(23:16) D(15:8) D(7:0) 0xA0000000 X X X USB 0xA0000004 X X X Controls X X X 0xA0000008 Test_Register

17. SOFTWARE

18. Software Objectives The software package currently includes: • Drivers supply the ability to read and write from the USB in 2 ways: • Polling • Interrupts • Those drivers run on the DSP. • USB drivers run on a PC (supplied with the USB module).

19. The Software (Main function) Evaluating Control Registers Checking Existence of SCB While(1)

20. Evaluating Control Register CE2CTL – handles read/write timings to EMIF where our USB is present We evaluated the CE2CTL to 0x3233CB03 which means: In write cycle: write setup = 30ns write strobe = 80ns write hold = 30ns In read cycle : read setup = 30ns read strobe = 110ns read hold = 30ns

21. Timer Registers Timer Control Reister – mainly deals with the referenced clock. We evaluated it to be the internal CPU clock divided by 4. Timer Period Register - The timer period register contains the number of timer input clock cycles to count. This number controls the frequency. We evaluated it to 0x00000001 which means – input clock divided by 2 For conclusion the altera that is connected to TOUT pin gets a 20Mhz Clock that is the internal CPU clock divided by 8.

22. USB Read unsigned char read_usb(void) { unsigned char *pUsb_Chip; pUsb_Chip =(unsigned char *)USB_CHIP_ADDR; while (reciever_buff_ready() == NOT_READY); return *(pUsb_Chip); } unsigned char reciever_buff_ready(void) { unsigned char *pControl; pControl =(unsigned char *)USB_CONTROL_ADDR; if((*(pControl)& RXF_MASK) != 0) return(NOT_READY); else return(READY); } The read_usb() function waits until the receiver buffer is ready to be read, and then reads the next byte. The receiver_buff_ready() function verifies that the receiver buffer is ready by polling the RXF bit.

23. USB Write void write_usb(unsigned char data) { unsigned char *pUsb_Chip; pUsb_Chip=(unsigned char *)USB_CHIP_ADDR; while (xmitter_buff_ready() == NOT_READY); *(pUsb_Chip)= data; } unsigned char xmitter_buff_ready(void) { unsigned char *pControl; pControl=(unsigned char *)USB_CONTROL_ADDR; if((*(pControl)& TXE_MASK) != 0) return(NOT_READY); else return(READY); } The write_usb() function waits until the transmitter buffer is ready to receive the next byte, and then writes it . The xmitter_buff_ready() function verifies that the transmitter buffer is ready to receive the next byte by polling the TXE bit.

24. Read Interrupts this function is the interrupt function. Every time the RXF goes down to 0 the CPU jumps to this function. This function reads the next byte from the receiver buffer and writes it to the current offset (RxWritePtr) from pRamMemory that’s mapped to SDRAM at 0x80000000. static void interrupt HRD_prvISR_USB_RX(void) { extern unsigned char ReadTailPtr; register unsigned int *pRamMemory; pRamMemory = (unsigned int *)0x80000000; INTR_CLR_FLAG(CPU_INT5); *(pRamMemory + ReadTailPtr++) = read_usb_intr(); if (ReadTailPtr > 999) ReadTailPtr = 0; } unsigned char read_usb_intr(void) { unsigned char *pUsb_Chip; pUsb_Chip = (unsigned char *)USB_CHIP_ADDR; return *(pUsb_Chip); } This read function doesn’t need to wait until the receiver buffer is ready to be read.

25. Demonstration • Evaluating registers • Checking existence of SCB • Writing 0xAB to the altera register • Reading from the altera register and comparing the value to 0xAB • Creating 1000 bytes buffer for reading from USB • Initializing offset pointers and start point • Sending data from the USB test application • Upon receiving an interrupt storing the data in the buffer • While loop for checking new data in buffer and writing it back to the USB.