CS 230: Computer Organization and Assembly Language

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CS 230: Computer Organization and Assembly Language. Aviral Shrivastava. Department of Computer Science and Engineering School of Computing and Informatics Arizona State University. Slides courtesy: Prof. Yann Hang Lee, ASU, Prof. Mary Jane Irwin, PSU, Ande Carle, UCB. Announcements. Quiz 2

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### CS 230: Computer Organization and Assembly Language

Aviral Shrivastava

Department of Computer Science and Engineering

School of Computing and Informatics

Arizona State University

Slides courtesy: Prof. Yann Hang Lee, ASU, Prof. Mary Jane Irwin, PSU, Ande Carle, UCB

Announcements
• Quiz 2
• Project 2
• Quiz 3
• Thursday, Oct 06, 2009
• Complete Chapter 3
• Project 3
• Implement an assembler
Multiplication

Multiplicand 1 0 0 0Multiplier x 1 0 0 1 --------------

1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0

------------------Product 1 0 0 1 0 0 0

• Binary makes it easy
• Multiplier bit = 0  place 0
• Multiplier bit = 1  place multiplicand
• (232-1)*(232-1) = 264 – 2.232 + 1 – need 64-bits
Multiplication

Multiplicand 1 0 0 0Multiplier x 1 0 0 1 --------------

1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0

------------------Product 1 0 0 1 0 0 0

0 0 0 0 1 0 0 0 x 1 0 0 1----------------------------------

0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0

----------------------- 0 1 0 0 1 0 0 0

What should be added in each step

Shift left

Shift right

Multiplicand

Multiplier

64-bit

Test

64-bit ALU

Control

Write

Product

64-bit

Multiplication

0 0 0 0 1 0 0 0 x 1 0 0 1-------------------------------------

0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0

----------------------- 0 1 0 0 1 0 0 0

1. Initialize

3. Shift left multiplicand, shift right multiplier

4. Test

5. Shift left multiplicand, shift right multiplier

6. Test

7. Shift left multiplicand, shift right multiplier

9. Shift left multiplicand, shift right multiplier

10. Done

Shift left

Shift right

1001

01000000

00100000

00010000

10000000

00001000

0000

0001

0100

0010

8-bit

4-bit

Test

Control

Write

01001000

00001000

00000000

8-bit

Multiply Algorithm 2

Multiplicand 1 0 0 0Multiplier x 1 0 0 1 --------------

1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0

------------------Product 1 0 0 1 0 0 0

1 0 0 0 x 1 0 0 1------------------------------------

0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0

----------------------- 0 1 0 0 1 0 0 0

Partial Product at each step

Shift right

Multiplicand

Multiplier

32-bit

Test

32-bit ALU

Control

Write

Product

64-bit

Shift right

Multiply Algorithm 2

1 0 0 0 x 1 0 0 1----------------------------

0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0

----------------------- 0 1 0 0 1 0 0 0

1. Initialize

3. Shift product right, shift multiplier right

4. Test

5. Shift product right, shift multiplier right

6. Test

7. Shift product right, shift multiplier right

9. Shift product right, shift multiplier right

10. Done

Shift right

1000

0010

0100

1001

0000

0001

4-bit

4-bit

Test

Control

Write

01000000

00010000

00000000

10010000

10000000

00100000

01001000

8-bit

Shift right

Multiply Algorithm 2*

1 0 0 0 x 1 0 0 1-------------------------------------

0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0

----------------------- 0 1 0 0 1 0 0 0

Multiplicand

32-bit

32-bit ALU

Control

Write

Test

Multiplier

64-bit

Shift right

Multiplication
• multu \$rs \$rt
• Has 2 sources (32-bit registers)
• No explicit destination
• Has 2 implicit destinations
• \$hi – upper 32-bits
• \$lo – lower 32-bits
• Have to explicitly read these registers
• mflo \$rd
• Moves from \$lo to \$rd
• mfhi \$rd
• Moves from \$hi to \$rd
• Also mult – signed multiply
• Multiply & then take care of the sign separately
Division

Divisor 1000 Quotient 1001

Dividend: 1001010

0001010

0001010

0001010

0000010 Remainder

1001 Quotient

---------------

Divisor 1000 | 1001010

- 1000

-----------

10

101

1010

-1000

---------

10 Remainder

Shift right

Shift left

Divisor

Quotient

64-bit

32-bit

Subtract

64-bit ALU

Control

Write

Remainder

64-bit

Test

Division

1001 Quotient

---------------

Divisor 1000 | 1001010

- 1000

-----------

10

101

1010

-1000

---------

10 Remainder

1. Initialize

2. Subtract & test

3. Restore remainder, push 0 in quotient, shift divisor right

4. Subtract & test

5. Push 1 in quotient, shift divisor right

6. Subtract & test

7. Restore remainder, push 0 in quotient, shift divisor right

8. Subtract & test

9. Restore remainder, push 0 in quotient, shift divisor right

10. Subtract & test

11. Push 1 in quotient, shift divisor right

12. Done

Shift right

Shift left

10000000

0001

01000000

00010000

00100000

00000100

00001000

0100

1001

0000

0010

8-bit

4-bit

64-bit ALU

Control

Write

11001010

11101010

00001010

11111010

00001010

01001010

00000010

01001010

00001010

8-bit

Test

Division
• div, divu
• \$lo = \$rs/\$rt; \$hi = \$rs%\$rt
• Need mflo and mfhi
• Transfer results of div to normal registers
• Signed Division
• Calculate the sign bit separately
Improved Division
• Instead of shifting divisor right
• Shift remainder to left
• Use the least significant bits of remainder to store the quotient

Divisor

32-bit

32-bit ALU

Control

Write

Remainder

64-bit

Shift right

Yoda says…
• Luke: I can’t believe it.
• Yoda: That is why you fail