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E- RoC : Embedded RAIDs-on-Chip for Low Power Distributed Dynamically Managed Reliable Memories *

E- RoC : Embedded RAIDs-on-Chip for Low Power Distributed Dynamically Managed Reliable Memories *. Luis Bathen , Nikil Dutt University of California, Irvine. * This work was presented at DATE 2011. Low Vdd. Aggressively Low Vdd. Distributed Memories and Voltage Scaling.

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E- RoC : Embedded RAIDs-on-Chip for Low Power Distributed Dynamically Managed Reliable Memories *

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  1. E-RoC: Embedded RAIDs-on-Chip for Low Power Distributed Dynamically Managed Reliable Memories* Luis Bathen, NikilDutt University of California, Irvine * This work was presented at DATE 2011

  2. Low Vdd Aggressively Low Vdd Distributed Memories and Voltage Scaling • Trend towards multicore platforms • Distributed on-chip memories • By 2014 up to 94% chip area may be memories • Saving Power? • Voltage Scaling Technology scaling + environment + Process Variations Increased vulnerability to soft-errors! + + Voltage Parametric Manufacturing Errors Overdriven Vdd Errors intentionally Introduced by aggressive Vdd scaling Nominal Vdd Reduced power consumption at the cost of introducing errors! Memory Array y x [Kurdahi, Eltawil 2008]

  3. BIST/ECC Makhzan et al. [ICCD 2007], Kim et al. [DATE’06], Lee et al. [CASES ’06], Ghosh et al. [ITC 2004] Redundancy Lucente et al. [CICC ‘90] , Zhang et al. [ICS ‘04] ECC/replication hybrids Zhang et al. [DSN ’03], Li et al. [ICCAD ‘05] RAID: very successful for reliable distributed data storage Can we exploit RAID notions for on-chip memories? Related Work in Memory Reliability Memory characterization/BIST is very expensive ! ECC/hybrids incur high performance and power consumption overheads

  4. Towards Embedded RAIDs (E-RAIDs) Guarantee 24/7 uptime under heavy IO loads Software/Hardware RAID controllers Different RAID levels For performance/reliability (RAID0, RAID1, RAID5…) Traditional RAID – Storage Sytems Embedded RAID - SoCs RAID Controller Introduce HW/SW E-RAID Manager Logical SPMs (Virtual Address Space) CPU CPU CPU CPU CPU CPU CPU CPU RAID 1 (Mirroring) CPU HD On-Chip Bus On-Chip Bus System Bus Embedded RAID Levels DSPAM Allocation Policies SPM SPM SPM SPM SPM SPM SPM SPM ERoC ERoC RAID 5 (Stripe + Mirroring) HD HD HD HD System Bus System Bus Aggressive Voltage Scaling Embedded RAIDs-on-Chip Different Platform Configurations (CMP, NoC, etc.) E-RoC Framework E-RoC Manager E-RoC Manager

  5. Case for E-RAIDs E-RoC Manager IF ERAID Levels E-RAID 1 (Mirroring) E-RAID 0 (1 Byte stripping) E-RAID 0 (1 Byte stripping) 512 B SPM 512 B SPM 512 B SPM 512 B SPM 512 B SPM 512 B SPM 512 B SPM 512 B SPM 2KB SPM @ Nominal Vdd Vs. 8bit Byte 1 Byte 0 Byte 2 Byte 3 4 x 8bit 14% increase @ 2e-20 SEU 8% savings @ 1e-15 SEU 19% savings @ 6e-12 SEU 46% savings @ 7e-2 SEU • Provide Same Memory Space • Parallel IOs • Voltage scaled 32bit Incurs power consumption overhead at high Vdd Power Reduction Percentage Voltage scale induced errors handled automatically by E-RAID levels! Saves power at low Vdd

  6. Embedded RAID Levels and Logical SPMs MM CPU CPU CPU CPU Traditional RAIDs Customized E-RAID levels (Mirroring, Parity, No E-RAID, etc.) Logical SPMs (LSPMs) Associated with an E-RAID level Expose LSPMs to the outside world Managed as regular SPMs Efficient allocation policies Embedded RAIDs ERoC SPM SPM SPM SPM • Statically defined • Create and use for entire app run • Allocate an entire SPM to a RAID level • Greatly limits SPM utilization App1: 1KB App1: 1KB App2:2KB App2:2KB CPU2 CPU2 CPU0 CPU0 CPU1 CPU1 Successful allocation of both E-RAID levels! Address Virtualization Layer LSPM of 1K LSPM of 2K Parity, 3x2K Mirroring, 2x1K E-RAID Level Layer Mirroring, 2x1K Parity, 3x2K App2 is not successful in creating Parity RAID E-RoC Manager 1K 1K 4K 1K 4K 1K 4K 4K 1K 4K 4K Physical Level Layer 1K 4K 1K 4K 1K 4K 1K 4K Inefficient SPM utilization! Transparent and efficient utilization of SPM space! 1K 1K 1K 1K

  7. Sample Experimental Results: Power & Performance Comparison Platform: 8 Core CMP with 8x4KB SPMs (32KB) Baseline: SPM @ Nominal Vdd All others: Voltage Scaled (Vdd = 0.65) Benchmarks: JPEG Encoder/Decoder, H263 Encoder Traditional (ECC/DUP): High Power Consumption Overhead AVG: 64% increase Traditional (ECC/DUP): High Performance Overhead AVG: 9.2% MM CPU CPU CPU CPU CPU CPU CPU CPU E-RoC: Minimal overall performance overhead AVG: 2.3% SPM SPM SPM ERoC SPM SPM SPM SPM SPM E-RoC: AVG savings of 76% Reduced power consumption with minimal performance overhead!

  8. Introduced Embedded RAIDs-on-Chip (E-RoC) Key ideas are: Reliability via redundancy using E-RAID levels Custom E-RAID levels optimized for use in embedded SoCs Dynamic allocation of distributed SPMs Virtualization support (Logical SPMs) Use RAID-like policies to achieve a fully distributed low power and reliable on-chip memory subsystem Our experimental results show that E-RoC can attain 76 % average power reduction over ECC based approaches Minimal performance overhead (2.3% AVG) To learn more come to my poster! Conclusion

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