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MODULE II. MICROCONTROLLERS & EMBEDDED SYSTEMS. STACK IN8051. Section of RAM Store information temporarily Data or address Needs stack due to limited number of registers Register inside CPU to point to the stack SP – stack pointer to access the stack SP is 8- bits wide.

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stack in8051
  • Section of RAM
  • Store information temporarily
  • Data or address
  • Needs stack due to limited number of registers
  • Register inside CPU to point to the stack
  • SP – stack pointer to access the stack
  • SP is 8- bits wide

Can take values from 00 to FF

8051 is powered up , SP register contains values 07.

RAM locations 08 is the first location used for the stack.

Storing of CPU register to stack – PUSH

Pulling the contents from stack to CPU register – POP

SP is very critical when push and pop actions are performed

pushing into the stack
Pushing into the stack
  • SP points to the last used location of the stack
  • As we push data on to the stack the stack pointer is incremented by one.
  • For every byte of data stored on the stack SP is incremented by one.
  • To push the registers on to the stack we must use their RAM address
  • Example: PUSH I – pushes register 1 onto the stack.
popping from the stack
Popping from the stack
  • Contents of the stack back to the register
  • Opposite of pushing
  • With every pop the top byte of the stack is copied to the register specified by the instruction
  • SP is decremented once.
8051 flag bits psw register
8051 flag bits & PSW register
  • Flag register is called PSW in 8051
  • Indicate arithmetic conditions
  • 8 – bit register
  • 6 – bits are used by 8051
  • Two unused bits are user definable.
  • 4 flags are conditional flags
  • CY(carry), AC(auxiliary carry), P(parity), OV(overflow)
PSW 3 and PSW4 are designated as RS0 and RS1

Used to select bank registers

PSW5 and PSW1 bits are general purpose status flag bits

Can be used by the programmer for any purpose

Ie. User definable










CY – Carry Flag

  • sets whenever there is a carry out from the D7 bit.
  • Can be set by the instruction SETB C.
  • Reset by CLRB C
  • Bit addressable
  • AC – Auxiliary Carry bit
  • sets when there is a carry from D3 to D4 during addition or subtraction

P – Parity Flag

  • Reflects the number of 1s in accumulator
  • For Odd parity P is 1
  • For even parity P is 0
  • OV – overflow flag
  • Set when the result of signed number operation is too large
  • Used to detect errors in signed arithmetic operations
i o ports
I/O Ports
  • Four ports for I/O operations
  • P0, P1, P2 and P3
  • Each use 8 pins
  • On RESET all are configured as input ports
  • When first zero is written to the port it becomes an output .
  • To reconfigure to an input a 1 must be sent to the port
  • To use the port as input ports it must be programmed.
port 0
Port 0
  • 8 pins (32 – 39)
  • Can be used as input or output
  • Each pin must be connected to 10K ohm pull up resistor
  • Po is open drain (MOS chips)
  • To make the port O as input port , it must be programmed by writing 1 to all the bits.
  • Port O is designated as AD0- AD7 , used for both address and data.
  • When connecting an external memory port O provides both address and data – ie multiplexing
port 1
Port 1
  • 8 pins (1 to 8)
  • Can be used as input or output
  • Does not need pull up resistors
  • Has pull up resistors internally
  • On reset configured as input port
  • To reconfigure it as input port write 1 to all its bits.
port 2
Port 2
  • Eight pins (pins 21 through 28)
  • Can be used as input or output
  • Does not need pull up resistors
  • Internal pull up resistors
  • Upon reset configured as input port

Dual role of port2

  • In 8051 P2 is used as simple I/O
  • In 8031based systems port2 is used along with P0 to provide the 16 bit address for external memory

Port 2 is designated as A8 – A15.

  • P0 provides lower eight bits and P2 provides higher eight bits
  • Po, P1 and P2 are used for I/O operation
port 3
Port 3
  • Eight pins (pins 10 through 17)
  • Can be used as input or output
  • Does not need pull up resistors
  • Upon reset configured as input port
  • Has the additional function of providing interrupts
  • P3.0 and p3.1 are used for RxD and TxD serial commn. Signals
  • P3.2 and p3.3 for external interrupts

Bits P3.4 and P3.5 are used for timers 0 and 1

  • P3.6 and P3.7 are used to provide the write and read signals of external memory
  • In 8751,89C51 or DS89C4x0 pins P3.6 and P3.7 are used for I/O
  • Rest of the pins are used for alternate function role.
timers in 8051
Timers in 8051
  • 8051 has two timers
  • Timer0 and Timer1
  • Can be used either as timers or as event counters
  • Timer o and Timer1 are 16 bit wide
  • Each 16 bit timer is accessed as two separate registers of low byte and high byte
timer o registers
Timer O Registers
  • 16 bit register
  • Accessed as low byte and high byte
  • Low byte register – TLO
  • High byte register – THO
  • These registers can be accessed as any other register such as A, B, R0, R1, R2 etc.
  • These can be read as any other register


timer 1 registers
Timer 1 Registers
  • 16 bits
  • Split into two bytes
  • Referred to as TL1 an d TH1
  • Can be accessed in the same way as the registers of timer0


tmod timer mode register
TMOD(timer mode) register
  • Timer 1 Timer 0
  • Timer 0 and timer 1 use the same register TMOD
  • Sets the various timer operation mode
  • TMOD is an eight bit register
  • Lower 4-bits for timer 0
  • Upper four bits for timer 1
  • Lower two bits are used to set the timer mode
  • Upper two bits are used to specify the operation

MI , MO – select the timer mode

  • Three modes – 0, 1, and 2
  • Mode 0 is a 13 bit timer mode – 8bit timer , 5 bits prescaler
  • Mode 1 is a 16 bit timer – no prescaler
  • Mode 2 is an 8 bit timer – auto reload
  • C/T – timer or counter select
  • Cleared for timer operation (delay generator)
  • Clock source is the crystal frequency of 8051
  • Set for counter operation

every timer has a means of starting and stopping

Some timers do this by software and hardware

8051 timers have both controls

When GATE= O, S/W start and stop are controlled by TR bits of TCON register

This is achieved by the instructions SETB TR1 and CLRB TR1 for timer 1.

These instruction s start and stop the timers as long as GATE = O.

When GATE = 1 the starting and stoping of Timers are done by means of external H/W.

tcon timer control register
TCON (Timer control) register
  • Is an 8 bit, bit addressable reg
  • TF 0/1 –timer 0/1 overflow flag
    • Set by H/W on timer/ counter overflow and cleared when interrupt processed.
  • TR 0/1 -timer 0/1 run control bit
    • Set or cleared by S/W to turn timer/ counter ON/ OFF

IE 0/1 - Interrupt 0/1 edge flag

    • Set by H/W when external interrupt edge detected
    • Cleared when interrupt processed
  • IT 0/1 - Interrupt 0/1 type control bit
    • Set or cleared by S/W to specify falling edge/ low level triggered external interrupt.
serial port
  • Serial data transmission and reception is possible with the TxD and RxD pins of 8051 microcontroller .
  • Two registers are used for this purpose SBUF AND SCON.
  • SBUF Reg
    • Is an 8 bit reg
    • Holds a byte of data during txn and rxn
    • It can be accessed like any other reg in 8051

When a byte is written into SBUF, it is framed with the start and stop bits and sends serially via the TxD pin

  • Similarly, when the bits received serially via RxD, the 8051 deframes it by eliminating the stop and start bits.

SCON (serial port control) reg

  • Is an 8 bit reg used to program the start bit stop bit and data bits of data framing
  • Is a bit addressable reg
  • SM 0,1 -serial port mode control bits
    • Set or cleared by S/W

SM 2 - serial port mode control bit 2

    • set by S/W to disable reception of frames for which bit 8 is zero.
  • REN -receiver enable control bit
    • Set/ cleared by S/W to enable/ disable serial data reception
  • TB 8 – transmit bit 8
    • Set/ cleared by H/W to determine state of ninth data bit transmitted in 9 bit UART mode.
  • RB 8 - receive bit 8
    • Set/ cleared by H/W to determine state of ninth data bit received in 9 bit UART mode.

TI - transmit interrupt flag

    • Set by H/W when byte transmitted and cleared by S/W after servicing.
    • Sets when the transfer of 8- bit character.
    • Indicates that it is ready to transfer another byte.
    • Raised at the beginning of the stop bit.
  • RI -receive interrupt flag
    • Set by H/W when byte received and cleared by S/W after servicing
    • When data is placed in the SBUF it raises the RI bit.
    • Indicates that a byte has been received and should be picked up before it is lost.
    • RI is raised halfway through the stop bit.
xtal 1 xtal 2
  • 8051 has an on – chip oscillator
  • Requires an external clock to run it.
  • A quartz x’al oscillator is connected to inputs XTAL 1 and XTAL2.
  • Oscillator connected needs two capacitors.
  • 8051 family has various speeds.
  • Speed means max. oscillator frequency connected to x’al.
  • A frequency source other than oscillator is connected to XTAL1 .
  • XTAL 2 is left unconnected.
  • RESET pin , input pin
  • Normally low.
  • When high pulse is applied, MC will reset .
  • Terminate all activities.
  • It is referred to as power – on- reset.
  • All values in the registers will be lost.
  • Sets PC to 0.
ea external access
EA (External Access)
  • For on – chip ROM storage EA pin is connected to Vcc.
  • EA is connected to ground for code storage on external memory.


  • Output pin
  • Stands for program store enable
  • When external ROM holds the program code this pin is connected to OE pin of the ROM.
ale address latch enable
ALE (Address Latch Enable)
  • Output pin
  • Active high
  • Port 0 provides both address and data.
  • ALE pin is used for de multiplexing the address and data.