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CS 444/544 OS II Lab Session #7

CS 444/544 OS II Lab Session #7. Concurrency Lab #1. Fork Concurrency Lab 1. • Go to • https://gitlab.unexploitable.systems/root/concurrency1. • Click fork. • Set visibility: Private. Clone your lab. • On flip1,2,3 or os1 or 2

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CS 444/544 OS II Lab Session #7

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  1. CS 444/544 OS II Lab Session #7 Concurrency Lab #1

  2. Fork Concurrency Lab 1 • Go to • https://gitlab.unexploitable.systems/root/concurrency1 • Click fork • Set visibility: Private

  3. Clone your lab • On flip1,2,3 or os1 or 2 • git clone git@gitlab.unexploitable.systems:[your-gitlab-id]/concurrency1.git • This will generate a directory ‘concurrency1’ • Read and implement c1.c

  4. Some commands • make • Will build all test programs • make test-all • Will run all tests with perf (monitoring both running time & cache-miss) • make clean • Remove all files. You can build all by running ‘make’ again

  5. Check

  6. Check 2

  7. Check 3

  8. Read Directions in c1.c • You will implement • bad_lock() / bad_unlock() • xchg_lock() / xchg_unlock() • cmpxchg_lock() • tts_xchg_lock() • backoff_cmpxchg_lock()

  9. Lock Variable • lock == 0 • No thread acquired the lock • The first thread that sees this value (0) can acquire lock • Acquiring lock • lock = 1 (set the value as 1, must change the value from 0 to 1)

  10. Lock Variable • lock == 1 • There is a thread that has already acquired the lock • Other threads see this value must WAIT! • Releasing lock • lock = 0 (set the value as 0, must change the value by the thread who acquired the lock)

  11. Bad_lock() • We will use non-atomic software operations to implement a lock • This will be failed • We practice failure to learn software-only lock implementation is impossible… • Use while to check-and-wait for the value 0, and set 1 for lock • Set 0 for unlock

  12. xchg_lock() • We will use the atomic xchg instruction in Intel x86 to implement a lock • xchg [memory], [register] • This will swap the value in memory to the value of register atomically • E.g., • Memory = 0, register = 1 • -> memory = 1, register = 0 • Memory = 1, register = 1 • -> memory = 1, register = 1 • Register == 0 will be the condition of acquiring the lock..

  13. xchg_lock() • Need to write inline assembly • Please refer to the figure • You need to write a similar • But different code • Learn inline assembly • https://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html

  14. xchg_lock() • Use xchg to implement lock • Set lock = 1 if lock == 0 • while • xchg • Use xchg to implement unlock • Set lock = 0

  15. Cmpxchg_lock() • Please implement cmpxchg

  16. Cmpxchg_lock() • cmpxchg [register], [memory] • eax stores the value to be compared to the memory (0) • register stores the value to be swapped (1) • Depending the content in memory • If memory == 0 (eax) • memory = 1 (update), eax = 0 • If memory == 1 • Memory = 1 (not update), eax = 1

  17. Cmpxchg_lock() • Use cmpxchg (lock, compare, xchg_value) to implement a lock

  18. tts_xchg_lock() • We will implement test and test-and-set using • Software test (while) • Hardware Test-and-set (xchg) • Algorithm • Check if lock == 0 • If it is, try update using xchg. • If succeed, you acquired the lock! • If not, go back to the 1stline…

  19. backoff_cmpxchg_lock() • We will implement test and test-and-set with exponential backoff • Read and understand why this is helpful • https://en.wikipedia.org/wiki/Exponential_backoff • https://geidav.wordpress.com/tag/exponential-back-off/

  20. backoff_cmpxchg_lock() • Fill the function

  21. Answer Questions in answer-c1.txt • After that, tag your commit with ‘c1-final’ and push!

  22. Some References • Inline assembly • https://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html • Test-and-set • https://en.wikipedia.org/wiki/Test-and-set • Test and test-and-set • https://en.wikipedia.org/wiki/Test_and_test-and-set • Exponential backoff • https://en.wikipedia.org/wiki/Exponential_backoff • https://geidav.wordpress.com/tag/exponential-back-off/

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