Lecture 07 DC and AC Load Line

1. Lecture 07 DC and AC Load Line DC biasing circuits DC and AC equivalent circuit Q-point (Static operation point) DC and AC load line Saturation Cutoff Condition Compliance and AC Load Line

2. Book Reference Electronic Devices and Circuit Theory by Robert Boylestad & Louis Nashelsky ( Prentice Hall ) Electronic Devices by Thomas L. Floyd ( Prentice Hall ) DC and AC Load Line

3. DC Biasing Circuits • The ac operation of an amplifier depends on the initial dc values of IB, IC, and VCE. • By varying IB around an initial dc value, IC and VCE are made to vary around their initial dc values. • DC biasing is a static operation since it deals with setting a fixed (steady) level of current (through the device) with a desired fixed voltage drop across the device. DC and AC Load Line

4. Purpose of the DC biasing circuit To turn the device“ON” To place it in operation in the region of its characteristic where the device operates most linearly, i.e. to set up the initial dc values of IB, IC, and VCE DC and AC Load Line

5. Voltage-Divider Bias The base-emitter junction of the transistor is forward biased through the voltage divider circuit set up by RB1 and RB2 (RE stabilizes the DC signals against variations in HFE) Therefore RE is essential for DC biasing purposes But the inclusion of RE limits the available AC voltage swing (max possible voltage swing will be limited to VCC-VE) The bypass capacitor C3 is used to shorten RE in front of the AC signal while not affecting the DC bias conditions since it appears as an open circuit in front of DC bias DC and AC Load Line

6. Graphical DC Bias Analysis (1) DC and AC Load Line

7. DC Load Line • The straight line is know as the DC load line • Its significance is that regardless of the behavior of the transistor, the collector current IC and the collector-emitter voltage VCE must always lie on the load line, depending ONLY on the VCC, RC and RE • (i.e. The dc load line is a graph that represents all the possible combinations of IC and VCE for a given amplifier. For every possible value of IC, and amplifier will have a corresponding value of VCE.) • It must be true at the same time as the transistor characteristic. Solve two condition using simultaneous equation •  graphically Q-point !! What is IC(sat) and VCE(off) ? DC and AC Load Line

8. Q-Point (Static Operation Point) • When a transistor does not have an ac input, it will have specific dc values of IC and VCE. • These values correspond to a specific point on the dc load line. This point is called the Q-point. • The letter Q corresponds to the word (Latent) quiescent, meaning at rest. • A quiescent amplifier is one that has no ac signal applied and therefore has constant dc values of IC and VCE. EE3110 DC and AC Load Line

9. Q-Point (Static Operation Point) • The intersection of the dc bias value of IB with the dc load line determines the Q-point. • It is desirable to have the Q-point centered on the load line. Why? • When a circuit is designed to have a centered Q-point, the amplifier is said to be midpoint biased. • Midpoint biasing allows optimum ac operation of the amplifier. DC and AC Load Line

10. DC Biasing + AC signal When an ac signal is applied to the base of the transistor, IC and VCE will both vary around their Q-point values. When the Q-point is centered, IC and VCE can both make the maximum possible transitions above and below their initial dc values. When the Q-point is above the center on the load line, the input signal may cause the transistor to saturate. When this happens, a part of the output signal will be clipped off. When the Q-point is below midpoint on the load line, the input signal may cause the transistor to cutoff. This can also cause a portion of the output signal to be clipped. DC and AC Load Line

11. DC Biasing + AC signal DC and AC Load Line

12. AC Load Line The ac load line of a given amplifier will not follow the plot of the dc load line. This is due to the dc load of an amplifier is different from the ac load. DC and AC Load Line

13. AC Load Line What does the ac load line tell you? The ac load line is used to tell you the maximum possible output voltage swing for a given common-emitter amplifier. In other words, the ac load line will tell you the maximum possible peak-to-peak output voltage (Vpp ) from a given amplifier. (AC Saturation Current Ic(sat) , AC Cutoff Voltage VCE(off) ) DC and AC Load Line

14. AC Saturation Current and AC Cutoff Voltage DC and AC Load Line

15. DC and AC Equivalent Circuits Bias Circuit DC equivalent circuit AC equivalent circuit DC and AC Load Line

16. The AC load line equation derivation On the other hand the AC load line can be obtained by writing KVL for the circuit shown ic(ac)rc+vce(ac)=0 Or alternatively ic(ac)=-vce(ac)/(rc) (2) DC and AC Load Line

17. The AC load line The total collector current in the circuit is composed from the DC and AC components Ic(total)=ICQ+iC(ac) (3) The total collector emitter voltage is composed from DC and AC components as well vce(total)=vCEQ+vce(AC) (4) If we rearrange (3) and combine it with (2) and (4) we get Ic(total)-ICQ=-1/RC*[vce(total)-vCEQ] (5) DC and AC Load Line

18. The AC load line Equation (5) represent the a linear relation between ic(total) and vce(total) which is the AC load line When vce(total)=0, then the max collector current Ic(total)max=ICQ+vCEQ/RC (6) On the other hand when ic(total)=0, then vce(total)=vCEQ+RC*ICQ (7) The AC load line will have a slope of -1/RCwhere RC here is the AC resistance of the amplifier DC and AC Load Line

19. The maximum optimum possible swing In order to achieve the maximum possible AC swing then the Q point has to be in the middle of the AC load line The above condition is based on the assumption that RB1 and RB2 are adjustable to meet the corresponding IB and VBE bias conditions If we assume that the Q point is in the center of the AC load line then the max collector current is twice than the DC collector current Ic(max)=2iCQ (8) If we replace Ic(max) by Ic(total)max=ICQ+vCEQ/RC Then we may have the following relation 2ICQ=ICQ+VCEQ/RC or ICQ=VCEQ/rC (9) DC and AC Load Line

20. The maximum optimum possible swing Analytical solution for both ICQ and VCEQ in terms of VCC, rCandREcan be obtained by solving the DC load line equation(10) and (9) i.e. VCC=VCEQ+ICQ(RC+RE) (10) VCC=VCEQ+VCEQ(RC+RE)/RC(11) or VCC=VCEQ(1+(RC+RE)/RC)) (12) Rearranging (12) we get VCEQ=VCC(RC/(2RC+RE)) (13) If RC is the AC equivalent resistance and RC+RE is the DC equivalent resistance then VCEQ=VCC(RAC/(RAC+RDC)) DC and AC Load Line

21. The maximum optimum possible swing If we take RAC as a common factor the denominator and the numerator, then VCEQ=VCC/(1+RDC/RAC) DC and AC Load Line

22. The maximum optimum possible swing Now the ICQ current can be found from (9) and (13) as ICEQ=VCC (RC/(2RC+RE))*1/RC (14) OR ICEQ=VCC/(RAC+RDC) (15) Graphically the Q point for maximum optimum swing can be found by following these steps Constructing the DC load line Drawing the AC load line by determining the points of IC(max)and VCE when IC=0 The operating conditions should be chosen so as not to exceed the maximum collector dissipation DC and AC Load Line

23. AC- load line example Refer to the examples in your note book DC and AC Load Line

24. Using an infinte coupling capacitor When a capacitor is used to connect the load the AC equivalent resistance became as RAC=RC//RL The maximum load current can be found from the current divider rule according to ILmax=Icmax*RC/RL DC and AC Load Line

25. Cutoff and Saturation Clipping When determining the output compliance for a given amplifier, solve both equation (A) and (B). The lower of the two results is the compliance of the amplifier. DC and AC Load Line

26. Example For the voltage-divider bias amplifier shown in the figure, what is the ac and dc load line. Determine the maximum output compliance. DC and AC Load Line