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Preliminary Design Review

Preliminary Design Review. EVLA 1 st and 2 nd Local Oscillators. Specifications – 1 st LO. 12-20 GHz F O = (n*512 MHz +/- FTS) where 23<=n<=40 Tuning Span F o +/- TBD Phase Noise -90 dBc @ 10 kHz @ 20 GHz (x fs) -107 dBc @ 100kHz @ 20 GHz (x fs) Output Power +14 dBm +/- 0.5 db.

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Preliminary Design Review

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  1. Preliminary Design Review EVLA 1st and 2nd Local Oscillators

  2. Specifications – 1st LO • 12-20 GHz • FO = (n*512 MHz +/- FTS) where 23<=n<=40 • Tuning Span Fo +/- TBD • Phase Noise • -90 dBc @ 10 kHz @ 20 GHz (x fs) • -107 dBc @ 100kHz @ 20 GHz (x fs) • Output Power • +14 dBm +/- 0.5 db EVLA LO-IF PDR 22-23 January 2002

  3. Electromagnetically Tuned YIG oscillator by Micro-Lambda Integrated Drivers Requires +15 VDC @ 700mA and +24 VDC @ 50 mA 1.75” Cylinder 1st LO YIG EVLA LO-IF PDR 22-23 January 2002

  4. Specifications - 2nd LO • 10.8 – 14.8 GHz • Fo = n*128 +/- FTS where 84<=n<=116 • Tuning Span: Fo +/- TBD (almost continuous) • Phase Noise • -90 dBc @ 10 kHz @ 14.8 GHz • -105 dBc @ 100 kHz @ 14.8 GHz • Output Power • +14 dBm +/- 0.5 dB EVLA LO-IF PDR 22-23 January 2002

  5. Permanent Magnet YIG Oscillator by Micro-Lambda Integrated Drivers Requires +/- 12 VDC @ 365 & 165 mA and +15 VDC @ 50 mA ~ 7.2 Watts 1” Cube 2nd LO YIG EVLA LO-IF PDR 22-23 January 2002

  6. General Functional Description • Power on reset – report back “OK” • MIB Frequency command • Coarse tune loop (prescaler + MIB) • AGC DAC set to cal data • Loop Closes, Lock to comb +/- FTS • Output tracks FTS • Only monitor data reported back, FTS operates “autonomously” reducing M/C load & RFI EVLA LO-IF PDR 22-23 January 2002

  7. Reference • Herotek Comb Generator • 128 or 512 MHz @ 0 dBm input • Integrated driver amplifier, +15 VDC @ 200mA • “Like” GC526, GC100 • Equalizer (Custom Matched) • Band Pass Filter • Splitter (2 or 4-way) EVLA LO-IF PDR 22-23 January 2002

  8. YIG Isolator Prescaler Coupler AGC Amplifier Output Coupler Output Splitter Mixer L port Mixer R Port Comb Generator Equalizer BPF Splitter (2 or 4 Way) Block Diagram EVLA LO-IF PDR 22-23 January 2002

  9. Mixer I port Band Pass Filter (128 MHz) IF Amplification Band Pass Filter Divider Lock Detector Phase Detector Phase Detector Loop Filter FM Coil Driver (Loop Closed) Block Diagram EVLA LO-IF PDR 22-23 January 2002

  10. Design Considerations • MIB handles most functions • Onboard SRAM holds cal data, etc. • No Mechanical Adjustments • SPI bus devices – DAC’s, ADC’s and digital potentiometers • Design in flexibility in prototype – “EVB” EVLA LO-IF PDR 22-23 January 2002

  11. RFI Considerations • Comb line filtered at source • Continuous wire mesh gaskets • Front panel ?? • Prescaler • Non – RF connectors minimally sized EVLA LO-IF PDR 22-23 January 2002

  12. Monitor O/P Power FTS Power Lock YIG Heater I PLL V and I Frequency (1 MHz) Temperature Control YIG Main Tune AGC Reset FTS Parameters Various Calibration capabilities (NO MECHANICAL!) Monitor and ControlPoints EVLA LO-IF PDR 22-23 January 2002

  13. Front Panel • Lock indicator (not uP dependant) • Frequency • FTS Sample • Reference / Clock Sample • FM coil Voltage / (selectable) EVLA LO-IF PDR 22-23 January 2002

  14. Questions EVLA LO-IF PDR 22-23 January 2002

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