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Standards and Specifications The Seven Wonders of Design Innovation






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Standards and Specifications The Seven Wonders of Design Innovation. INTRODUCTION TO IPC & STANDARDIZATION. Minimum Standards Tool Kit. Membership Development. PCB Manufacturers 382 EMS Companies 374 Suppliers 636 OEMs 753 Government/Others _ 198__
Standards and Specifications The Seven Wonders of Design Innovation

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Slide 1

Standards and SpecificationsThe Seven Wonders of Design Innovation

INTRODUCTION TO IPC & STANDARDIZATION

Slide 2

Minimum Standards Tool Kit

Slide 3

Membership Development

  • PCB Manufacturers 382

  • EMS Companies 374

  • Suppliers 636

  • OEMs 753

  • Government/Others _198__

    Total 2,343 Companies

  • IPC Designers Council 1,100 Individuals

Slide 4

Major IPC Program Areas

  • Management Programs

  • Industry Programs

  • Technical Programs

  • Education, Training & Certification

  • Market Research/Statistical Programs

  • Public Policy Advocacy

Slide 5

Technical Programs

  • Standards & Specifications

  • Technical Committees

  • Activities with Other Organizations

  • International Activities

  • Current Major Initiatives

Slide 6

Technical Programs

Standards & Specifications

  • Standards, specifications and guidelines developed for PCB design, manufacture and assembly

  • ANSI-Accredited Standards Developing Organization (SDO)

  • Industry technology roadmaps

  • Software Code Standards for Interoperability

Slide 9

Technical Programs

Technical Committees

  • 21 General Committees

  • 160 Subcommittees and Task Groups

    • Consist of industry peers

    • Started writing standards in 1959 (46 years ago)

    • Responsible for round robin test programs

    • Managed by Technical Activities Executive Committee (TAEC)

Slide 10

Technical Programs

Activities with Other Organizations

Membership and Active Participation

  • National Electronics Manufacturing Initiative (NEMI) now iNEMI

  • American National Standards Institute (ANSI)

  • Underwriters Laboratories (UL)

Slide 11

Technical Programs

Activities with Other Organizations

Joint Standards Activity

  • Japan Printed Circuit Association (JPCA)

  • Wiring and Harness Manufacturers Association (WHMA)

  • Electronic Industries Alliance (EIA)

  • Joint Electron Device Engineering Council (JEDEC)

  • Jisso International Council (JIC)

Slide 12

Technical Programs

International Activities

  • Liaison “D” Status to IEC TC91

  • U.S. Technical Advisor (TA) IEC TC91 on SMT

  • Chairmanship of IEC TC91 on SMT

  • Secretary, US TAG on IEC TC93 on EDA

  • US TAG of ISO Task group on Solder materials

  • IPC standards internationally recognized

Slide 13

Technical Programs

Current Major Initiatives

  • Optoelectronics

  • Lead-Free & Halogen Free issues

  • Embedded components

  • Wire Harness workmanship

  • Electronics enclosures

  • 2004/2005 International Technology Roadmap

  • Material Declaration

  • Enterprise Communication Standards

Slide 14

004/2005

2004/2005

2002 - 2003

2004-2005

Slide 15

IPC Membership Location

  • A Global Membership

    • 78% North America

    • 11% Europe

    • 9% Asia

    • 2% Rest of World

  • Members in 47 Countries

Slide 16

How Does the Standards Process Work?

  • Task groups develop drafts of new standards and resolve comments at IPC meetings

  • Participants represent their company

  • Four stages to get comments from industry

    • Project Submission - TAEC approves form

    • Working Draft - gets project started

    • Proposal -solicits comments from industry

    • Interim Final - resolves comments for balloting

Slide 17

Standard Development Cycle

Industry Needs

Working Drafts

Project Approval

Expert review

Proposal

Final Ballot

Distribution

Slide 18

Terms and Definitions

  • Terminology is the key to good communication

  • IPC-T-50 initial release in 1965

    • Next revision is “H” scheduled for 2007

  • Use of the Treutler Classification Code

  • Builds on the standardization process

  • Contains over 2000 terms

  • Has international recognition

    • IEC 60194 – identical except spelling

Slide 19

Classification Code

  • 1-Administration

  • 2-Engineering and Design for elect. pkg

  • 3-Components for electronic packaging

  • 4-Materials for electronic packaging

  • 5-Interconnect board fabrication processes

  • 6-Types/performance for Interconnections

  • 7-Assembly processes

  • 8-Types/performance for assemblies

  • 9-Quality/reliability for boards/assembly

Slide 20

Second Digit Family 6 ID

  • 60-General terms

  • 61-Rigid printed boards (organic)

  • 62-Flexible printed boards (organic)

  • 63-Flex-rigid printed boards (organic)

  • 64-Discrete wiring boards (organic)

  • 65-Inorganic printed boards (ceramic etc.)

  • 66-Molded structures (three dimensional)

  • 67-Hybrid/Multichip module structures

  • 68-(Reserved for future expansion)

  • 69-Other interconnecting structure terms

Slide 21

CC Description Examples

22. PRINTED BOARD AND PRINTED BOARD ASSEMBLY DESIGN

Contains terms related to printed board and printed board assembly. Includes, but is not limited to computer aided design (CAD) equipment and software algorithms, such items as design rule checks, direct input from CAE work stations, gate assignment or gate swapping, fixed grid snap-in, force field component manipulation, heat sensitivity analysis, multi-directional conductor routing etc.

77. REWORK, REPAIR AND MODIFICATION

Contains terms related to the techniques, tools, materials and equipment used to remove, replace, or add components to an interconnecting structure, or to correct/change a circuit feature in the structure itself, and terms related to restoring the assembly to its proper function.

Slide 22

IPC-T-50 Published

  • Embedded Component 30.0436

    A discrete or active component that is fabricated as an integral part of a printed board. (See Figure E-1.)

Slide 23

IPC-T-50 Published

  • Discrete Component 30.0392

    A separate part of a printed board assembly that performs a circuit function, e.g., a resistor, a capacitor, a transistor,etc.

  • Active Device 30.0016

    An electronic component whose basic character changes while operating on an applied signal. (This includes diodes, transistors, thyristors, and integrated circuits that are used for the rectification, amplification, switching, etc., of analog or digital circuits in either monolithic or hybrid form.)

  • Passive Component (Element) 30.1468

    A discrete electronic device whose basic character does not change while it processes an applied signal. (This includes components such as resistors, capacitors, and inductors.)

Slide 24

Terms and Definitions

Slide 25

Terminology

  • Blank * 41.1339

    An unprocessed or partially processed piece of base material or metal- clad base material, that has been cut from a sheet or panel, that has the rough dimensions of a printed board. (See also ‘‘Panel.’’)

  • Panel * 41.1463

    A rectangular sheet of base material or metal-clad material of predetermined size that is used for the processing of one or more printed boards and, when required, one or more test coupons. (See also ‘‘Blank.’’)

  • Fabrication Panel

    A rectangular sheet of base material or metal-clad material of predetermined size that is used by a printed board manufacturer for the processing of one or more printed boards and, when required, one or more test coupons. (See also ‘‘Blank.’’)

  • Board * 60.0118

    see ‘‘Printed Board,‘‘ and ‘‘Multilayer Printed Board.’’

  • Printed Board (PB) * 60.1485

    The general term for completely processed printed circuit and printed wiring configurations. (This includes single-sided, double-sided and multilayer boards with rigid, flexible, and rigid-flex base materials.)

Slide 26

Terminology

  • Multilayer Printed Board * 60.1227

    The general term for a printed board that consist of rigid or flexible insulation materials and three or more alternate printed wiring and/or printed circuit layers that have been bonded together and electrically interconnected.

  • Finished Board

    see “Printed Board”

  • Finished Panel

    A rectangular sheet of base material or metal-clad material of predetermined size that is used for the processing of one or more printed board designs and, when required, one or more test coupons which is extracted from the fabrication panel to deliver to the customer or to the next level of fabrication. (see Assembly Pallet)

  • Assembly* 80.1327

    A number of parts, subassemblies or combinations thereof joined together. (Note: This term can be used in conjunction with other terms listed herein, e.g., ‘‘Printed Board Assembly’’)

  • Printed Board Assembly* 80.0911

    The generic term for an assembly that uses a printed board for component mounting and interconnecting purposes.

  • Array* 22.0049

    A group of elements or circuits arranged in rows and columns on a base material.

Slide 27

Terminology

  • Printed Board Assembly Array

    A group of assemblies, all of the same design, arranged in rows and columns on a panel.

  • Assembly Pallet

    The generic term for the assembly that uses a finished panel, as delivered from the board fabricator, of the same or different designs, for element and circuit component mounting and attachment to the board interconnections layers. The board arrangement on the pallet may be random or in the form of an array; the pallet may also include coupons for testing.

Slide 28

Hierarchy of IPC Design Standards(2220 Series)

IPC-2220

IPC-2221

GENERIC

IPC-2222

IPC-2223

IPC-2224

IPC-2225

IPC-2226

RIGID

FLEX

PCMCIA

MCM-L

HDI

Slide 29

Hierarchy of Printed Board Performance Standards(6010 Series)

IPC-6010

IPC-6011

GENERIC

IPC-6012

IPC-6013

IPC-6014

IPC-6015

IPC-6016

RIGID

FLEX

PCMCIA

MCM-L

HDI

Slide 30

Applicable IPC Standards

  • -SM-782; Land Pattern Considerations

  • -7095; BGA Process Implementation

  • -2315; HDI & Microvia Design Guide

  • -SM-785; SMT Reliability Testing

  • -D-279; Design for SMT Reliability

  • J-STD-001; Soldering Requirements

  • -A-610; Assembly Acceptability

  • -6010; Printed Board Series

  • J-STD-004/005; Solder Flux/Paste

Slide 31

Scope Example (land patterns)

  • This standard provides information on land pattern geometries used for surface attachment of electronic components.

  • The intent of the information presented is to provide the appropriate size, shape and tolerance of surface mount land patterns to insure sufficient area for the appropriate solder fillet or solder volume.

  • Also to allow for inspection, testing, and rework of those solder joints.

Slide 32

Scope (continued)

  • Land pattern geometry may be different based on the type of soldering used to attach the electronic part, however land patterns are defined in such a manner that they are transparent to the process.

  • Standard configurations are for manual designs & for computer-aided design.

  • Parts are mounted on one or both sides, subjected to wave, reflow, or other type of soldering

Slide 33

Scope (continued)

  • Although patterns are dimensionally defined and since they are a part of the printed board circuitry geometry, they are subject to the producibility levels and tolerances associated with plating, etching, assembly or other conditions.

  • The producibility aspects also pertain to the use of solder mask and the registration required between the solder mask and the conductor patterns.

Slide 34

Performance Classes

  • Three performance classes have been established to reflect progressive increases in sophistication, functional performance requirements and testing/ inspection frequency.

  • There may be an overlap of equipment categories in different classes.

  • The user is responsible to specify, in the contract or purchase order, the product performance class.

Slide 35

Class 1 - General Electronic Products

Includes consumer products, some computer and computer peripherals suitable for applications where cosmetic imperfections are not important and the major requirement is function of the completed printed board.

Slide 36

Class 2 - Dedicated Service Electronic Products

Includes communications equipment, sophisticated business machines, instruments where high performance and extended life is required and for which uninterrupted service is desired but not critical. Certain cosmetic imperfections are allowed.

Slide 37

Class 3 - High Reliability Electronic Products

Includes the equipment and products where continued performance or performance on demand is critical. Equipment downtime cannot be tolerated and must function when required such as in life support items or flight control systems. Applications where high levels of assurance are required and service is essential.

Slide 38

Interpretation

“Shall,” the emphatic form of the verb, is used throughout this specification whenever a requirement is intended to express a provision that is binding. Deviation from a “shall” requirement may be considered if sufficient data is supplied to justify the exception.

The words “should” and “may” are used whenever it is necessary to express non-mandatory provisions.

“Will” is used to express a declaration of purpose. To assist the reader, the word “shall” is presented in bold characters.

Slide 39

Complexity Levels

  • Land pattern determination methods:

    • Exact details based on component specifications, board manufacturing and component placement accuracy. The land patterns are restricted to a specific component, and have an identifying land pattern number

    • Equations used for new components or to alter the given information to achieve a more robust solder connection, when used in particular situations

Slide 40

Level A: Maximum

  • For low-density product applications, the 'maximum' land pattern condition have been developed to accommodate wave or flow solder of leadless chip devices and leaded gull- wing devices.

  • The geometry furnished for these devices, as well as inward and “J”-formed lead contact device families, may provide a wider process window for reflow solder processes as well.

Slide 41

Level B: Median

  • Products with a moderate level of component density should consider adapting the 'median' land patterns.

  • The median land patterns furnished for all device families will provide a robust solder attachment condition for reflow solder processes.

  • The condition should suitable for wave or reflow soldering of leadless chip and leaded gull-wing type devices.

Slide 42

Level C: Minimum

  • High component density typical of portable and hand-held product applications may consider the 'minimum' land pattern geometry variation.

  • Selection of the minimum land pattern geometry may not be suitable for all product use categories.

Slide 43

Combination of Issues

  • Performanceclasses 1, 2, and 3 are combined with that of complexity and density levels A, B, and C in defining electronic assembly conditions.

  • As an example, combining the description as Levels 1A or 3B or 2C, would indicate the different combinations of performance and component density to understand fabrication and assembly requirements for manufacturing and end use environment.

Slide 44

Test Requirements

  • Prior to starting a design, a testability review meeting should be held with fabrication, assembly, and testing.

  • Testability concerns, such as circuit visibility, density, operation, circuit controllability, partitioning, and special test requirements and specifications are discussed as a part of the test strategy

Slide 45

Test Requirements

  • During the design testability review meeting, tooling concepts are established, and determinations are made as to the most effective tool cost versus board layout concept conditions.

  • During the layout process, any circuit board changes that impact the test program, or the test tooling, should be reported to determine the best compromise.

Slide 46

Board Test Requirements

  • The testing concept should develop approaches that can check the board for problems, and also detect fault locations wherever possible.

  • The test concept and requirements should economically facilitate the detection, isolation, and correction of faults of the design verification, manufacturing, and field support of the printed board assembly life cycle.

Slide 47

Assembly Testability

  • The printed board assembly testability philosophy also needs to be compatible with the overall integration, testing and maintenance plans. This includes:

    • The factory testers to be used

    • How integration and test is planned

    • When conformal coated is applied

    • Depot & field test equipment capability

    • Personnel skill level

Slide 48

Need for Automation

  • Standards needed for design and assembly

  • New concepts in Business process optimization for competitiveness

    • A need for lower operating costs in business and Information Transfer (IT).

    • Tight business alignment with IT is essential

    • Development of internal and external Service Oriented Architecture is needed in order to manage the new culture change.

    • Shorten product development cycles

    • Increase product flexibility

  • Solutions require continuous monitoring of industry progress & infrastructure growth

Slide 49

IPC to IEC Deployment

  • IPC-SM-782 provided by US to IEC

  • Countries agree to standardize

  • Japan found that one land pattern is insufficient to design Sony Minicam™ assemblies

  • Discussions review principles of mathematical model – tighten requirements

  • Three geometries proposed for future

  • IEC starts work on IEC-61188-5-1 thru -8

  • IPC supersedes SM-782A with IPC-7351

  • Computer model tested with PCB Libraries

Slide 50

IPC-7351 Land Pattern Variations

Density Level A: Maximum (Most) Land Protrusion - for low component density applications and products exposed to high shock or vibration. The solder pattern is the most robust and can be easily reworked if necessary.

Density Level B: Median (Nominal) Land Protrusion - for products with a moderate level of component density and providing a more robust solder attachment.

Density Level C: Minimum (Least) Land Protrusion - for miniature devices where the land pattern has the least amount of solder pattern to achieve the highest component packing density.

Slide 51

IPC-7351 Land Pattern Variations for

Rectangular Two Terminal Devices

Density Level A

Very Robust

Solder Joint

Density Level B

General Purpose

Solder Joint

Density Level C

Minimal Solder Joint

for

High Density Applications

Slide 52

IPC-7351 Land Pattern Variations for

Flat Ribbon ‘L’ and Gull Wing Leads

Density Level A

Very Robust

Solder Joint

Density Level B

General Purpose

Solder Joint

Density Level C

Minimal Solder Joint

for

High Density Applications

Slide 55

Ribbon Leads greater than 0.625

Slide 56

Ribbon Leads less than 0.625

Slide 57

J LeadedParts

Slide 58

RectangularSquare endTerminations

Slide 59

Metal Electrical Face

Slide 60

Bottom Only Terminations

Slide 61

Leadless Chip Carriers

Slide 62

Inward L shapedLeads

Slide 63

Flat Lug Leads

Slide 64

Quad Flat No Lead

Slide 65

Small Outline No Lead

Slide 66

Design Considerations

  • Land pattern concepts

  • Component selection

  • Mounting substrate design

  • Assembly methods

  • Method of test

  • Phototool generation

  • Meeting solder joint requirements

  • Stencil fixture requirements

  • Providing access for inspection

  • Access for rework and repair

Slide 67

Manufacturing Allowance

  • Manufacturing allowance must be considered in the design process

  • The courtyard represents the starting point of the minimum area needed for the component and the land pattern

  • Manufacturing, assembly and testing representatives should assist in determining the additional room needed to accommodate placement, testing, modification and repair

Slide 68

Component / pattern

(maximum boundary)

Courtyard

excess

Courtyard

(minimum area)

Manufacturing

allowance

Courtyard

manufacturing

zone

IPC-7351 Land Pattern Courtyard Determination

Slide 69

IPC-7351 Land Pattern Naming Convention

  • The numbering convention used in IPC-SM-782A was very basic

    • Fixed number range assigned to a specific component family (prone to exhaustion)

    • No intelligence embedded within them

  • A new land pattern naming convention was designed for IPC-7351 to convey a number of attributes:

    • Component family prefix

    • Component pin pitch

    • Component body dimensions

    • Component Pin Quantity

    • Land Pattern Geometry

Slide 70

IPC-7351 Land Pattern Naming Convention Example

  • Using an 0.80 mm pitch Quad Flat Package (QFP), the IPC-7351 Land Pattern Naming Convention is as follows:

    • QFP80P+Lead Span L1 Nominal X Lead Span L2 Nominal – Pin Qty

    • where the + (plus sign) stands for “in addition to” (no space between the prefix and the body size),

    • the X (capital letter X) is used instead of the word “by” to separate two numbers such as height X width,

    • the – (dash) is used to separate the pin quantity,

    • and the suffix letters “L”, “M” and “N” signify when the land protrusion is at their minimum (least), maximum (most) or median (nominal) geometry variation.

Slide 71

IPC-7351 Land Pattern Naming Convention Example (cont’d)

QFP80P+1720 X 2320-80N

  • Therefore, the above land pattern name conveys the following information:

  • The component family prefix of QFP

  • The component pin pitch of 0.80 mm

  • The component lead span nominal X = 17.20 mm for “1720”

  • The component lead span nominal Y = 23.20 mm for “2320”

  • The total component pin quantity of 80 pins

  • Density Level B (Nominal) land pattern geometry

Slide 72

IPC-7351 Zero Component Rotations

  • IPC-7351 provides zero component rotations that are defined in terms of the standard CAD component library with respect to a given PCB design

    • Acknowledges that a single land pattern may be used for the same component part from different suppliers, all of whom may provide different orientations for tape or reel

    • Eliminates scenarios where a PCB designer loses the ability to reference a single land pattern when the zero component rotation is according to the method the component is delivered to the assembly machine

Slide 73

IPC-7351 Zero Component Rotations

Slide 74

IPC-7351 Land Pattern Software Suite

Slide 75

Part Selection

Slide 76

Nominal Library Search

Slide 78

Component Descriptions

Slide 79

Land Patterns

Slide 80

Land Patterns and Courtyards

Slide 81

Density Level B

Density Level A

Density Level C

Slide 82

Land Patterns and Courtyards

Density Level A

Density Level B

Density Level C

Slide 83

IPC-7351 Land Pattern Viewer

  • Shareware program included with IPC-7351 standard and available at www.ipc.org under “PCB Tools and Caculators”

  • Portability – doesn’t require a Web browser

  • Enhanced searching capabilities

  • 1:1 relationship for components/graphics

  • Easily updated through free download of .p library files and program revisions

Slide 84

Building on the Standards

  • IPC website and listservs will provide feedback point for new land pattern generation

  • Developing CAD interfaces

  • Incorporating the Concepts into OffSpring (the child of GenCAM and ODB++) IPC-2581 (IEC 61182-2)

  • Beta testing to start end of 2005

  • Many CAD CAM companies committed

Slide 85

IPC-2581 Beta Testing

  • Data extraction from CAD

  • CAM step and repeat plus process tolerance inclusion

  • Design file review (Pad Stacks) versus layered data

  • Assembly information tied to CAD libraries

  • Provide updated viewer to industry

  • Provide Gerber to 2581 converter

Slide 86

Function Mode

Slide 87

Logistic Header

Indicates file owner as well as Approved Vendors

Slide 88

History Record

Configuration Management Section

Slide 89

Bill of Materials

One to many BOMs including one for Board Material

Slide 90

Approve Vendor List

One master list referenced to BOM item & enterprise

Slide 91

The Heart and Stamina

Slide 92

The Information Vessels

Slide 93

Step Description

Mandatory Requirements

The step functions

define the details

of the electronic

assembly. This includes the parts, conductors, net list, and DFX analysis.

CAD

Library

The individual features

Slide 94

Home for Land Patterns

Slide 95

Detail Descriptions

LayerDesc includes:

BOARD BOARDPANEL ASSEMBLY ASSEMBLYARRAY COUPON DOCUMENTATION TOOLING MISCELLANEOUS

Slide 96

NIST Viewer

Slide 97

Gerber Conversion Evaluation

NIST Viewer

Original File

Next is conversion of Gerber Macros in “read me” file

Slide 98

IPC-25XX Certification

  • Develop concept for matrix

  • Examine D-350 and GenCAM test plans

  • Keep it simple

  • Build on self declaration principles

  • Establish legal documents for details

  • Ask NIST software engineering for help with portal development

  • Examine using 3rd party consultants

Slide 99

Conclusions

  • The standard is Alive and Well

  • The cooperative efforts are winning

  • New parts require continuous monitoring

  • The IPC/PCB Libraries arrangement is a major benefit to the design community

  • The IPC list servers are a way to keep in touch


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