Simple ideas and proposals Assumptions based on : Tentative to limit the triplications where strictly needed In criticality order. “ abcnasic ” SEU strategies. Protection about the “ DCL ” functions. An soft error on DCL may result in one or a few packets loss , if properly protected.
An soft error on DCL may result in one or a few packets loss, if properly protected.
One option would be the use of a watchdog synchronized to DCL_BUSY
This has to be evaluated by model and simulation
(Applying full triplication on the DCL logic would be a killer, because of the peak current activity)
Readout Port FIFO
ABCN-Last-2 data pending
ABCN-Last-1 data pending
Actually the “Readout” is the most “”unknown” part for concerns about soft errors, but the function is critical (serializer has to be able to send packets)
An option is to provide a “minimal” mode (after soft error or by addressable command) which is :
BYPASS (to adjacent chip data : ie only passing data through w/o local chip interruption)
This BYPASS mode should be fully soft error protected
Bypass (soft error or command)
S. Bonacini CERN
Double DFF with interleaved subblocks to separate redundant nodes
The DICE cell is currently ported to the current version of the IBM 130nm cell library (not Artisan) by Filipe De Sousa