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Senior Design 4006C Group G7 Final Report

Senior Design 4006C Group G7 Final Report. 1394b – Receiver The new generation of FireWire. Luke Starnes (gte874d) Aparna Trimurty (gt9794a) Jeff Schlipf (gte877e). Background - 1394. 1986 – Apple started FireWire IEEE 1394-1995 accepted on December 12, 1995 IEEE 1394a accepted in 2000

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Senior Design 4006C Group G7 Final Report

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  1. Senior Design 4006CGroup G7Final Report 1394b – ReceiverThe new generation of FireWire. Luke Starnes (gte874d) Aparna Trimurty (gt9794a)Jeff Schlipf (gte877e)

  2. Background - 1394 • 1986 – Apple started FireWire • IEEE 1394-1995 accepted on December 12, 1995 • IEEE 1394a accepted in 2000 • Late 1996 work began on new standard – 1394b • Draft for 1394b submitted to IEEE in 2001

  3. 1394 – Advantages over competition • Versatility • High Speed • Isochronous • Low Cost • User Friendly • Peer-to-Peer • All Digital • Includes power for device in cable

  4. 1394a – Specifications • Speeds up to 400Mbps • 4.5 meter cable 1394b - improvements • Transmit Further (up to 100 meters) • Faster (Speeds up to 1.6 Gbps) • Cost Reduction. • Smaller connector.

  5. Project Goals • Stage 1: - Create working Gigabit 1394 module • Stage 2: - Use receiver/post-amp kits to replace OE module • Stage 3: - Design our own reciever/post amp board

  6. Stage 1 • Purpose: testing an optomodule out of its original environment(TI card) by placing it on a evaluation board built by the group. • TI 1394b card never arrived, but the Opto-Emitter (OE) module used on card was the Agilent technologies HFBR-53D5, which was available.

  7. Agilent OE module schematic

  8. Built OE Module Board

  9. Loop Back Testing Procedures • GTS 1250 GBIC test system pattern generator Textronic TDS 7154 Digital Phosphor Oscilloscope

  10. Results using PRBS7 data pattern Eye diagram produces shows a slight scar, possibly from solder error

  11. Results using K28.7 data pattern Less complicated data pattern produced perfect eye.

  12. Stage 2 • Testing of the receiver MAXIM evaluation kits: - MAX 3266 (Transimpedance Amplifier or TIA) - MAX 3264 (Limiting Amplifier/Post Amp or LA) • This step of the design process is to provide groups not only with an understanding of the boards but also a basis for stage 3, which is an original RX PCB design.

  13. MAX3266 chip Layout

  14. MAX3266 chip includes: • A TIA which converts an input current from the PhotoDiode to an output voltage. • A DC cancellation circuit which is used to center the signal around zero. This is done through low frequency feedback. • Voltage amplifier which converts the single-ended signal into a differential one • Output Filter which is a single pole low pass filter that is used to limit the circuit’s bandwidth and improve noise performance • Output Buffer which is designed as a 100W differential load between OUT+ and OUT-

  15. 3266 Evaluation Kit • Simply hook your Photodiode into J1 and your Limiting Amplifier into J2 and J3 and your ready to test

  16. Testing the MAX3266 Kit MAX 3266 power connector design- can connect to a regular AC adaptor.

  17. Result of Testing MAX3266 Kit Perfect Eye diagram for TIA using PRBS7 data pattern

  18. Max3264 – Limiting Amplifier

  19. MAX3264 chip includes: • Offset correction and low pass filtering to reduce input offset • The power detector here looks at the signal from the input buffer and compares it to a threshold set by the TH resistor. The Resistor value will depend on the Loss Of Signal (LOS) desired • The signal is outputted to an output buffer also has a control module with two pins for Level (amplify current from 16mA to 20mA by connecting pin to GND) and Squelch (when connected to VCC it holds out+ and out- at a static voltage whenever the input signal power drops below the LOS threshold

  20. MAX3264 Evaluation Kit Simply connect your TIA to J4 and J5 and J2 and J3 to your output and your ready to go. LOS threshold programming also done here.

  21. Testing the connected TIA and LA Kits MAX 3264- changed connectors of ac adaptor to match board connector. Caused by a lack of accurate 5V power supplies.

  22. Result of connected TIA and LA Kits • Perfect eye is received from TIA + LA test with the PRBS7 data pattern

  23. Stage 3 • Purpose: the design and fabrication of a functional and cost effective receiver board based on the MAXIM board • In allowing for varied applications many components are ineffective for each specified application of the chip. All redundant components are omitted to provide a cost effective solution for a 1394b RX board.

  24. Old Design of TIA and LA from Evaluation Kits

  25. Modifications • 1.The Level pin was grounded on the 3264 to maximize output voltage. • 2.The Squelch pin was grounded on the 3264 to disable squelch. It is important to see all signals in testing, no matter how small they may be. • 3.The CAZ1 and CAZ2 pins on the 3264 are left open. In the specification sheet it is stated that for gigabit Ethernet these pins should be left open. • 4.The Filter pin was left open on the 3266 to enable DC cancellation. • 5.The Loss-of-Signal circuit was omitted to further simplify the board. This also allowed for the TH pin to be left open as this simply sets the threshold of the LOS circuit.

  26. Modifications (cont.) • 6.The power filtering inductors were omitted. This was possible based on the fact that three separate supplies will be used and long power cords will be used between the board and the power supplied. • 7.A single 1nF capacitor is used for decoupling the power supplies. Based on the use of three separate supplies 1nF should suffice. • 8.Decoupling capacitors for the input and output of the circuit as well as between the TIA and LA chips were left in to maintain a good signal.

  27. We need to determine current going into system from PhotoDector (PD) is adequate to support system and still maintain an open eye throughout New Design R1, R2, and R3 are removed and replaced with new R1 Ipd = 80uAp-p This is acceptable, new R1 = 66.7ohm Current design Resistors given values by specs of chip Rpd = 50W Ipd= 340uAp-p This is unacceptable

  28. New Modified Design

  29. SuperPCB Software Layout This is the SuperPCB layout that produced the Gerber file given to Bob House for the new modified design

  30. Parts needed:

  31. Final Soldered Receiver PCB Bob House fabricated board with all components soldered

  32. Testing the Board Initial testing revealed board had a high impedance mismatch and give skewed results Putting thumb over output appears to reduce this effect and outputs appear more normal

  33. Reduced Impedance Mismatch Impedance Mismatch

  34. Future Considerations and Recommendations We feel a new board should be fabricated perhaps perfessionally with the following improvements: • Separate the space between the SMA connectors on output by .25 inches in order to test both outputs at once. • The ground of the output SMA’s needs to be tied to central ground. • The 2 ground pins of the 3266 need to be tied to ground. • Create 2 separate input networks that can be chosen by a jumper Using a bit error rate tester to help in troubleshooting

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