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by Dr. K.K.Thyagharajan, M.E., Ph.D. Professor Department of Information Technology

Microprocessors and Microcontrollers. by Dr. K.K.Thyagharajan, M.E., Ph.D. Professor Department of Information Technology R.M.K. Engineering College Websites: www.tansitresearch .com www.geocities.com/kkthyagharajan/ Email: kktflashtraining@yahoo.co.in. 8085 Architecture.

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by Dr. K.K.Thyagharajan, M.E., Ph.D. Professor Department of Information Technology

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  1. Microprocessors and Microcontrollers by Dr. K.K.Thyagharajan, M.E., Ph.D. Professor Department of Information Technology R.M.K. Engineering College Websites: www.tansitresearch.com www.geocities.com/kkthyagharajan/ Email: kktflashtraining@yahoo.co.in

  2. 8085 Architecture • 8085 includes the following components: • Interrupt Control • Serial I/O Control • 8 bit Internal Data Bus • Accumulator • Temporary Register • Instruction Register • Instruction Decoder • Flags Register • Arithmetic Logic Unit (ALU) • Register Array • Timing and Control • Address Buffer

  3. 8085 Interrupt Control A hardware interrupt is a pin provided in 8085 The 8085 microprocessor has five hardware interrupts. If more than one interrupts are occurring simultaneously they will be recognized according to the priority set by the microprocessor. Table 2.1: Interrupts

  4. Bus is a group of lines used to transfer bits. • If an instruction has one operand (data) that data must be available in the Accumulator (e.g. Logical operations like NOT); from Accumulator ALU takes it and processes. • When an instruction has two operands (e.g. ADD instruction) one operand is stored in Accumulator and the other operand is stored / transferred to temporary register. • Any instruction, which is to be executed, is brought to the instruction register. • The Instruction decoder decodes the first byte of the instruction because this generally indicates the operation to be performed. Then it decides the number of machine cycles to be generated.

  5. Flags / Status Register

  6. ALU Arithmetic Operations Addition Subtraction Increment Decrement Compare Logic Operations AND OR EX-OR NOT Shift/Rotate

  7. 8085 Pin Diagram

  8. Address / Data Demultiplexing

  9. Address / Data Demultiplexing – Timing Diagram

  10. IO / M Decoding

  11. Instruction Execution

  12. Timing Diagram The sequence of operations that a processor has to carry out for executing the instruction is called Instruction cycle. Each instruction cycle of a processor consists of a number of machine cycles

  13. Address Opcode Mnemonic 4100 3E MVI A, 9AH 4101 9A

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