EE 5340 Semiconductor Device Theory Lecture 27 – Spring 2011

1. EE 5340Semiconductor Device TheoryLecture 27 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc

2. Fully biased n-MOScapacitor VG Channel if VG > VT VS VD EOx,x> 0 e- e- e- e- e- e- n+ n+ p-substrate Vsub=VB DeplReg Acceptors y 0 L

3. MOS energy bands atSi surface for n-channel Fig 8.10**

4. Computing the D.R. W and Q at O.S.I. Ex Emax x

5. Q’d,max and xd,max forbiased MOS capacitor Fig 8.11** xd,max (mm)

6. Fully biased n-channel VT calc

7. n-channel VT forVC = VB = 0 Fig 10.20*

8. Fully biased p-channel VT calc

9. p-channel VT forVC = VB = 0 Fig 10.21*

10. n-channel enhancementMOSFET in ohmic region 0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 e-e- e- e- e- n+ n+ DeplReg p-substrate Acceptors VB < 0

11. Conductance ofinverted channel • Q’n= - C’Ox(VGC-VT) • n’s= C’Ox(VGC-VT)/q, (# inv elect/cm2) • The conductivity sn = (n’s/t) q mn • G = sn(Wt/L) = n’s q mn(W/L) = 1/R, so • I = V/R = dV/dR, dR = dL/(n’sqmnW)

12. Basic I-V relationfor MOS channel

13. I-V relation for n-MOS (ohmicreg) ohmic ID non-physical ID,sat saturated VDS VDS,sat

14. Universal draincharacteristic ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS

15. Characterizing then-ch MOSFET VD ID D G B S VGS VT

16. Substrate bias effect on VT (body-effect)

17. Body effect data Fig 9.9**

18. Low field ohmiccharacteristics

19. MOSFET circuitparameters

20. MOSFET circuitparameters (cont)

21. MOSFET equivalentcircuit elements Fig 10.51*

22. MOS small-signal equivalent circuit Fig 10.52*

23. MOS channel-length modulation Fig 11.5*

24. Analysis of channellength modulation

25. Channel length mod-ulated drain char Fig 11.6*

26. Implanted n-channel enhance-ment MOSFET (ohmic region) 0< VT< VG e- channel ele+ implant ion Channel VS = 0 0< VD< VDS,sat EOx,x> 0 n+ n+ e-e- e- e- e- ++++++++++++ DeplReg p-substrate Acceptors VB < 0

27. Range Si & SiO2 Al Si3N4 DRP Si Al & SiO2 Si3N4 Ion implantation*

28. “Dotted box” approx**

29. Calculating xi andDVT

30. If xi ~xd,max

31. Calculating VT

32. Vt per Eq. 9.1.23 in M&K for a MOSFET with an 87-nm-thick gate oxide, Qff/q = 1011 cm-2, N’ = 3.5 X 1011 cm-2, and Na = 2 X 1015 cm-3. Both VS and VB = Figure 9.8 (p. 441) Implanted VT

33. Mobilities**

34. Substrate bias effect on VT (body-effect)

35. Body effect data Fig 9.9**

36. M&K Fig. 9.9 (Eq. 9.1.23)

37. Subthresholdconduction • Below O.S.I., when the total band-bending < 2|fp|, the weakly inverted channel conducts by diffusion like a BJT. • Since VGS>VDS, and below OSI, then Na>nS>nD, and electr diffuse S --> D Electron concentration at Source Concentration gradient driving diffusion

38. Band diagram along the channel region of an n-channel MOSFET under bias, indicating that the barrier qΦB at the source depends on the gate voltage. M&K Fig.9.10 (p.443)

39. Measured subthreshold characteristics of an MOS transistor with a 1.2 μm channel length. The inverse slope of the straight-line portion of this semilogarithmic plot is called the drain-current subthreshold slope S (measured in mV/decade of drain current). M&K Fig. 9.11 (p.444)

40. Subthresholdcurrent data Figure 10.1** Figure 11.4*

41. Mobility variationdue to Edepl Figures 11.7,8,9*

42. Velocity saturationeffects Figure 11.10*

43. References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986