Implementation phase
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Implementation Phase. Inputs: Development strategy & plan Completed, inspected & baselined SRS & SDS Standards (e.g. coding, name glossary) Outputs: Completed, Inspected & Configuration Controlled Software Components INS & LOGD forms for design & code inspections

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Implementation Phase

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Implementation phase

Implementation Phase

Inputs:

Development strategy & plan

Completed, inspected & baselined SRS & SDS

Standards (e.g. coding, name glossary)

Outputs:

Completed, Inspected & Configuration Controlled Software Components

INS & LOGD forms for design & code inspections

Unit test plans & support materials

Unit test & Integration test passed for all system software components

Completed & reviewed user documentation

Updated SUMP, SUMQ & LOGT forms

Updated project notebook

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


Implementation phase1

Implementation Phase

Inputs:

System integrated and passes Unit Test & Integration Test

Completed, Inspected and Configuration controlled software components

Outputs:

LOGTEST Forms (System Tester)

LOGD forms for all testing (Change Counter producer)

Updated SUMP, SUMQ & LOGT forms

Updated project notebook

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


Implementation planning design

Implementation Planning & Design

Implementation Planning

Review work & ensure all tasks are assigned

Detailed design & design review

Psuedo-code, comment blocks, your choice

Personal design review

Unit test Development

Develop special unit-test code & facilities (e.g. unit test harness, stubs)

Standard test coverage:

Logic decisions & paths

Loop stepping & termination

Variables & parameters – nominal/middle, upper & lower boundaries

Error conditions

Detailed Design Inspection (Review)

1-2 Developers, INS form & LOGD

Coding & Code Review

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


Code unit test

Code & Unit Test

Coding & Code Review

Estimate defects prior to personal code review

Code & execute personal code review

Recommend several passes – looking for different defects on each pass (see PSP checklist)

Execute “buddy” code review

Plan vs. Actual Check

Design, Design Review, Code & Code Review time to quality plan

Defect Levels & Defect Rates to quality plan

Quality criteria

Design time > coding time

Design review time > 50% of design time

Code review time > 50% of coding time

Code review defects > 2x compile found defects

3+ defects / review hour

< 200 LOC / review hour

Execute Unit Test per plan

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


Quality

Quality

Not just defect rates

Readability / Maintainability (e.g. good comment etiquette, indenting)

Easy to understand design

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


Proposed system test schedule

Proposed System Test Schedule

Note: Assumes system has already passed Integration Test

Full feature to system test and instructor by COB June 25 including:

Test environment

Executable

User documentation (note: CCRs can be filed against user documentation)

Source code

Tester generates CCRs for all finds & fills out LOGTEST

Email to instructor when generated (see below)

Development team updates LOGD referencing CCRs

Required turn-around times for fixes

80% within 24 hours

99% within 48 hours

Required test coverage short of blocking issues

80% First Pass Test Complete by June 28

100% First Pass Test Complete by June 30

Regression Test Complete by July 3

Daily test reports to instructor detailing test cases executed, results & CCRs

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


Due june 26 class

Due June 26 Class

Draft Measurment Plan

All Test Quality Records (LOGTEST, LOGD, CCRs, etc.)

Unit & Integration Test

Updated Products (code components, SRS, HLD, User Documentation)

Intermediate Products (e.g. Unit Test Plans)

Key Metrics Presentation (10-15 minutes)

No class on July 3

Note: July 10 class will do a full cycle 1 post-mortem

SE 652 - 2007_6_19_TSPImp_SVT_Lecture.ppt


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