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WhiteRabbit Timing System

WhiteRabbit Timing System. Goals. WhiteRabbit is designed to do... Time Synchronisation Timestamping Deterministic Switching Machine Control. Features. WhiteRabbit offers... Timing Accuracy: < 1ns, low ps jitter Robustness: event loss < 10 -12 Scalability: 2000 timing receivers

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WhiteRabbit Timing System

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  1. WhiteRabbitTiming System

  2. Goals • WhiteRabbit is designed to do... • Time Synchronisation • Timestamping • Deterministic Switching • Machine Control

  3. Features • WhiteRabbit offers... • Timing Accuracy: < 1ns, low ps jitter • Robustness: event loss < 10-12 • Scalability: 2000 timing receivers • Link length: up to 10 km

  4. Technology • WhiteRabbit employs ... • SyncE – Synchronous Ethernet • PTP – Precision Timing Protocol • QoS – Quality of Service • FEC – Forward Error Correction

  5. SyncE – Synchronous Ethernet • SyncE: One clock is enough • Nodes adjust to same physical clock • Clock encoded in Ethernet carrier • Clock recovered by PLL

  6. multi-layered WR Switches System Timing Master WR Nodes GPS SyncE – Synchronous Ethernet The way of the Rabbit: WR Clock propagation

  7. PTP – Precision Time Protocol Precise phase measurement – Aiming for accuracy • Undersample Clocks • Feed resulting alias frequencies to PLL • Determine phase difference

  8. PTP – Precision Time Protocol

  9. PTP – Precision Time Protocol PTP – Time Sync at a handshake • Exchange messages between nodes • Timestamp Msg arrivals and departures • Calculate link delay and time difference • Share results, adjust client clock

  10. PTP – A Simplified Example

  11. PTP – A Simplified Example

  12. PTP – A Simplified Example

  13. PTP – A Simplified Example

  14. PTP – A Simplified Example

  15. PTP – A Simplified Example

  16. PTP – A Simplified Example

  17. PTP – A Simplified Example

  18. PTP – A Simplified Example

  19. PTP – A Simplified Example

  20. QoS - Preemption & Determinism • QoS – Not all packets were created equal • Ethernet traffic split into: • High Priority (HP) packets • Standard Priority (SP) packets • HP packets can preempt other packets „on-the-fly”

  21. WR Switch SP Packet Port 1 HP Packet Port 2 Port 3 SP… HP Packet Packet QoS - Preemption & Determinism QoS – Allowing to cut the line

  22. FAIR Timing Master • Timing Data Master – Telling everyone what to do • Generate Event Sequences • Control Accelerator Production Chains • Real Time Parallel Scheduling in FPGA • Granularity Window for Load Balancing

  23. WhiteRabbit Hardware TODO: WR Switch Slide

  24. WhiteRabbit Hardware SPEC - Simple PCIe FPGA-Mezzanine-Card Carrier Board

  25. Status • Where WhiteRabbit is now: • High precision Time Sync functionality since 2009 • Switch, master and receiver specs in progress • WR switch prototype since 2010 • WR protocol implementation under development

  26. Perspective • Where WhiteRabbit will be: • Timing receiver board prototype late 2011 • WR capable ‚Simple PCIe FMC carrier‘ board early 2011 • WR Switch board manufacture in 2011 • FAIR Timing Data Master prototype in 2011

  27. Thank you for your attention

  28. ? ? Time for your Questions ? ?

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