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BIC CONFIGURATION FOR SECTOR TESTS

BIC CONFIGURATION FOR SECTOR TESTS. Input from : M. Albert, R. Denz., S. Gabourin, R. Giachino, V. Kain, C. Martin, J. Wenninger, M. Zerlauth. Very simple explanation about the LHC BIC. USER INPUTS: LBDS RF WIC BLM CCC EXP VAC FMCC SIS INJ ACCESS SMP PIC. A1 Loop B1 Loop.

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BIC CONFIGURATION FOR SECTOR TESTS

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  1. BIC CONFIGURATION FOR SECTOR TESTS Input from: M. Albert, R. Denz., S. Gabourin, R. Giachino, V. Kain, C. Martin, J. Wenninger, M. Zerlauth LHC Sector Test Meeting R. Alemany

  2. Very simple explanationaboutthe LHC BIC USER INPUTS: LBDS RF WIC BLM CCC EXP VAC FMCC SIS INJ ACCESS SMP PIC A1 Loop B1 Loop 5 A2 Loop B2 Loop 4 6 BIC BIC 7 3 BIC 2 8 1 EES QPS PC CRYO UGS UPS BeamPermitLoops : opticalfibresrunning highfrequency signals (10 MHz) generated in one of the 16 BICs 2x8 BeamInterlockControllers LHC Sector Test Meeting R. Alemany BIC

  3. Proposal: bic configurationfor SECTOR TESTS S23 & S78-S67-LBDS LHC Sector Test Meeting R. Alemany

  4. PARTICULARITIES FOR THE LBDS • New BIS board CIBDS: Direct link from BIS to Retriggering line + ACCESS SYSTEM  LBDS “commissioned @DSO“ LHC Sector Test Meeting R. Alemany

  5. SECTOR TEST S23 SECTOR TEST S78-S67-LBDS B1&B2 need to be commissioned (1)Should be tested @DSO test; if there are issues could have a jumper. (2)Covered by SIS; if doesn’t work could have a jumper. PIC is covered by SIS The unmaskable inputs not needed for the Sector Test will have a jumper and will be disabled. The maskable inputs if not commissioned and operational they will be masked or will have a jumper.

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