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Parallel High Throughput WLR Testing for Advanced Gate Dielectrics

Parallel High Throughput WLR Testing for Advanced Gate Dielectrics. P. Meyer. Agenda . Summary of new test challenges Large sample size Highly dynamic degradation mechanisms Conventional system and NBTI Conventional system and TDDB New concept Improved NBTI testing Improved TDDB testing

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Parallel High Throughput WLR Testing for Advanced Gate Dielectrics

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  1. Parallel High Throughput WLR Testing for Advanced Gate Dielectrics P. Meyer

  2. Agenda • Summary of new test challenges • Large sample size • Highly dynamic degradation mechanisms • Conventional system and NBTI • Conventional system and TDDB • New concept • Improved NBTI testing • Improved TDDB testing • How it works • Hybrid architecture • S510 and automated WLR test

  3. Reliability test challenges • Higher throughput required • Need larger sample size for testing thinner oxide • Minimizes error in Weibull distribution for thin oxide reliability test • Determines cross wafer variation due to increasing wafer size • Due to the nature of reliability tests, parallel test is a must for statistical analysis and lifetime prediction • New reliability issues = New test requirements • Minimize stress measure delay in NBTI test due to degradation recovery when stress is off

  4. For thinner gate oxide, b decreases, representing increasing randomness in device failure Statistical error increases with the same sample size for thinner oxide Increase in sample size to maintain statistical error Increasing sampling size for thin oxide Rolf-Peter Vollertsen IRPS 2004 Tutorial

  5. Device degradation may recover when stress is turned off Relaxation depends on temperature Device may reach 100% recovery at room temperature Degradation resumes after stress is reapplied 1st stress 2nd Stress % Id degradation Stress Off Relaxation Stress time (log) New test challenge: NBTI - Degradation Relaxation S. Rangan et al, IEDM 2003

  6. Time Dependent Relaxation

  7. WLR Survey Submit Clear What tests do you run? • HCI/CHC • TDDB • EM • NBTI/PBTI • QBD • BTS

  8. Agenda • Summary of new test challenges • Large sample size • Highly dynamic degradation mechanisms • Conventional system and NBTI • Conventional system and TDDB • New concept • Improved NBTI testing • Improved TDDB testing • How it works • Hybrid architecture • S510 and automated WLR test

  9. Conventional setup – stress, switch, and measure

  10. Shared Stress SMU

  11. NBTI: The problem IV sweep stress stress switch matrix Connection, SMU assignment switch matrix Connection, SMU assignment Device relaxation Minimize the device relaxation time

  12. Drawbacks of Conventional WLR Solutions • Sequential device measuring • Uncontrolled relaxation time: variable from device to device • Test one structure at a time for meaningful NBTI measurement results 2 Switch SMU Timing diagram for conventional WLR multiplexed SMU solution performing NBTI

  13. Agenda • Summary of new test challenges • Large sample size • Highly dynamic degradation mechanisms • Conventional system and NBTI • Conventional system and TDDB • New concept • Improved NBTI testing • Improved TDDB testing • How it works • Hybrid architecture • S510 and automated WLR test

  14. TDDB: Configuration 1 • Drawback • Voltage disruption during device breakdown

  15. TDDB – Modified configuration 1 • Adding series resistors to eliminate stress voltage disturbance when one device breaks down • Drawbacks • Effect of size of resistor on oxide breakdown to be examined • Time resolution depends on number of devices in parallel • Number of different stress conditions is limited to number of SMUs in system

  16. Advantages Simple setup, easy to implement Good time to breakdown accuracy Independent device control Drawback Number of devices in parallel is limited by cost, rack space, and instrumentation TDDB: Configuration 2

  17. Conventional WLR Solution Fails to Monitor Leakage Current During Stress • Sequential device measuring • Cannot continuously monitor devices during stress • Misses soft breakdown events • All devices must be placed under same stress conditions Switch SMU Timing diagram for conventional WLR multiplexed SMU solution performing TDDB

  18. WLR Survey Submit Clear What node is currently in technology development at your company? • Larger than 130nm • 130nm • 90nm • 65nm

  19. Agenda • Summary of new test challenges • Large sample size • Highly dynamic degradation mechanisms • Conventional system and NBTI • Conventional system and TDDB • New concept • Improved NBTI testing • Improved TDDB testing • How it works • Hybrid architecture • S510 and automated WLR test

  20. New Reliability Test Concept:SMU-per-Device • Source-measure unit (SMU) per device provides: • Device-independent stress conditions • Precision measurement capability • Simultaneous measurement

  21. Parallel SMU-per-Device Solution Controls Relaxation and Monitors During Stress • Seamless transition between stress and measure cycles • No uncontrolled relaxation time • Continuous and independent device monitoring during stress • Precise stress timing maximizes reliability modeling Timing diagram for new SMU-per-device (pin) architecture performing NBTI

  22. Parallel SMU-per-device Solution Provides Independent Stress and Continuous Measurements During Stress • Continuous measurements for maximum visibility into device failure • Soft breakdown noise not compounded by devices SMU sharing • Soft breakdown events always captured • Independent stress conditions for every device Timing diagram for new SMU-per-device (pin) architecture performing TDDB

  23. High Speed Parallel SMU Architecture

  24. Agenda • Summary of new test challenges • Large sample size • Highly dynamic degradation mechanisms • Conventional system and NBTI • Conventional system and TDDB • New concept • Improved NBTI testing • Improved TDDB testing • How it works • Hybrid architecture • S510 and automated WLR test

  25. Combining High Speed Parallel with High Resolution SMUs

  26. High Resolution and High Speed Parallel

  27. WLR Survey Submit Clear What kind of reliability testing do you do now? • One structure/device at a time (serial) • More than one structure/device at a time (parallel) • All structures in a site (parallel) • Multi site (massively parallel)

  28. Agenda • Summary of new test challenges • Large sample size • Highly dynamic degradation mechanisms • Conventional system and NBTI • Conventional system and TDDB • New concept • Improved NBTI testing • Improved TDDB testing • How it works • Hybrid architecture • S510 and automated WLR test

  29. A new system… • 4200-SCS - high resolution SMUs • 4500-MTS - high speed parallel SMUs • 707A - switch control • 7174A – low leakage switch matrix • 7136 – bypass switch

  30. S510 Software Capability • KTE for automation • Complex sample plans • Standard output file format • Handles large quantities of data • Automatic wafer prober drivers • Eases parallel test setup • Provides real time NBTI/TDDB test monitoring • Provides either interactive GUI or fully automatic operation

  31. High Throughput and Flexibility for Wafer-Level Reliability Testing • Dig out from ultra thin gate dielectric modeling backlog • Accelerate reliability modeling with high throughput parallel automated testing • Optimized for 65nm gate dielectric NBTI and TDDB reliability testing • Scalable: Starting at 20 parallel source/measure channels • Independent stress/measure channel for each structure

  32. S510 is the Latest in a Continuum ofScalable WLR Solutions

  33. Extending into the Fab with the S680

  34. Contact Keithley with Your Questions: • 1-888-KEITHLEY, ext. 3960, within the USA • 001-440-248-0400 Outside the USA • 010-82251886 in China • 089/84 93 07-40 in Germany/Europe • 0118-9 29 75 00 in Great Britain • 3-5733-7555 in Japan • 2-574-7778 in Korea • 3-5729077 in Taiwan See www.keithley.comfor additional worldwide offices Via e-mail to applications@keithley.com

  35. A Greater Measureof Confidence

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