# Computing Machinery Chapter 3: Combinational Circuits - PowerPoint PPT Presentation

1 / 28

Computing Machinery Chapter 3: Combinational Circuits. Half Adder. Full Adder. Full Adder Circuit. s = a b c in. +. +. Simplifying the Full Adder Circuit. C out = ab + ac in + bc in. N-Bit Adder. Ripple-Carry Adder. Carry Look-Ahead Adder (CLA). c in. a i. b i. g i = a i b i

I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.

Computing Machinery Chapter 3: Combinational Circuits

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.

- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -

#### Presentation Transcript

Computing Machinery

Chapter 3: Combinational Circuits

s = a b cin.

+

+

Cout = ab + acin + bcin

cin

ai

bi

gi = aibi

pi = ai + bi

ci+1 = gi + pici

1. Will ith FA generate a carry bit?

2. Will ith FA propagate a carry bit?

3. What is the carry-out for the ith FA?

ith FA

ci+1

si

Carry-Out Bits Circuit for CLA

Four-Bit CLA Circuit

Encoders

Building a 16 to 4 Encoder

Binary Coded Decimal (BCD) Encoder

Function Table

Encoders and Decoders

3-to-8 Decoder

(aka 1-of-8)

Implementing a Boolean Function using an Decoder

F(x,y,z) = m( 1, 2, 5, 7 )

Multiplexers and Demultiplexers

4-to-1 Multiplexer

1-to-4 Demultiplexer

Implementing a Boolean Function using a Multiplexer

G(x,y,z) = m( 1, 4, 5, 6 )

Magnitude Comparators

Designing a 2-Bit Magnitude Comparator

Voting Logic Circuit

Light Emitting Diode (LED) Displays

BCD to 7-Segment Display Function Table