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Other Technologies. Off-the-shelf logic (SSI) IC Logic IC has a few gates, connected to IC's pins Known as Small Scale Integration (SSI) Popular logic IC series: 7400 Originally developed 1960s Back then, each IC cost $1000 Today, costs just tens of cents. V. C. C. I. 14. I. 13. I.

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Other technologies
Other Technologies

  • Off-the-shelf logic (SSI) IC

    • Logic IC has a few gates, connected to IC's pins

      • Known as Small Scale Integration (SSI)

    • Popular logic IC series: 7400

      • Originally developed 1960s

        • Back then, each IC cost $1000

        • Today, costs just tens of cents

V

C

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14

I

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GND



Using logic ics

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k

p

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(b) Decompose into 2-input AND gates

Using Logic ICs

  • Example: Seat belt warning light using off-the-shelf 7400 ICs

    • Option 1: Use one 74LS08 IC having 2-input AND gates, and one 74LS04 IC having inverters

(a) Desired circuit

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(c) Connect ICs to create desired circuit

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74LS08

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74LS04

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Using logic ics1

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Converting to 3-input NOR gates

Using Logic ICs

  • Example: Seat belt warning light using off-the-shelf 7400 ICs

    • Option 2: Use a single 74LS27 IC having 3-input NOR gates

k

p

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Connecting the pins to create the desired circuit

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Other technologies1
Other Technologies

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  • Simple Programmable Logic Devices (SPLDs)

    • Developed 1970s (thus, pre-dates FPGAs)

    • Prefabricated IC with large AND-OR structure

    • Connections can be "programmed" to create custom circuit

      • Circuit shown can implement any 3-input function of up to 3 terms

        • e.g., F = abc + a'c'

O1

PLD

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programmable nodes


Programmable nodes in an spld

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programmable nodes

Programmable Nodes in an SPLD

  • Fuse based – "blown" fuse removes connection

  • Memory based – 1 creates connection

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ammable node

Fuse based

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use

"unbl

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"bl

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Memory based

mem

mem

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Pld drawings and pld implementation example

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PLD

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PLD Drawings and PLD Implementation Example

  • Common way of drawing PLD connections:

    • Uses one wire to represent all inputs of an AND

    • Uses "x" to represent connection

      • Crossing wires are not connected unless "x" is present

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wired AND

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PLD

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  • Example: Seat belt warning light using SPLD

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Two ways to generate a 0 term


Pld extensions

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programmable bit

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PLD Extensions

Two-output PLD

PLD with programmable registered outputs


More on plds
More on PLDs

  • Originally (1970s) known as Programmable Logic Array – PLA

    • Had programmable AND and OR arrays

  • AMD created "Programmable Array Logic" – "PAL" (trademark)

    • Only AND array was programmable (fuse based)

  • Lattice Semiconductor Corp. created "Generic Array Logic – "GAL" (trademark)

    • Memory based

  • As IC capacities increased, companies put multiple PLD structures on one chip, interconnecting them

    • Become known as Complex PLDs (CPLD), and older PLDs became known as Simple PLDs (SPLD)

  • GENERALLY SPEAKING, difference of SPLDs vs. CPLDs vs. FPGAs:

    • SPLD: tens to hundreds of gates, and usually non-volatile (saves bits without power)

    • CPLD: thousands of gates, and usually non-volatile

    • FPGA: tens of thousands of gates and more, and usually volatile (but no reason why couldn't be non-volatile)


Technology comparisons
Technology Comparisons

Full-custom

Standard cell (semicustom)

Gate array (semicustom)

FPGA

PLD

Quicker availability

Faster performance

Lower design cost

Higher density

Lower power

Larger chip capacity

Easier design

More optimized


Technology comparisons1

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essor

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Easier desi

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ammable

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(3)

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essor

PLD

FPGA

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Technology Comparisons

(1): Custom processor in full-custom IC

Highly optimized

(2): Custom processor in FPGA

Parallelized circuit, slower IC technology but programmable

Processor varieties

(3): Programmable processor in standard cell IC

Program runs (mostly) sequentially on moderate-costing IC

(4): Programmable processor in FPGA

Not only can processor be programmed, but FPGA can be programmed to implement multiple processors/coprocessors

IC technologies


Key trend in implementation technologies
Key Trend in Implementation Technologies

  • Transistors per IC doubling every 18 months for past three decades

    • Known as "Moore's Law"

    • Tremendous implications – applications infeasible at one time due to outrageous processing requirements become feasible a few years later

    • Can Moore's Law continue?


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