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Other Technologies

Other Technologies. Off-the-shelf logic (SSI) IC Logic IC has a few gates, connected to IC's pins Known as Small Scale Integration (SSI) Popular logic IC series: 7400 Originally developed 1960s Back then, each IC cost $1000 Today, costs just tens of cents. V. C. C. I. 14. I. 13. I.

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Other Technologies

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  1. Other Technologies • Off-the-shelf logic (SSI) IC • Logic IC has a few gates, connected to IC's pins • Known as Small Scale Integration (SSI) • Popular logic IC series: 7400 • Originally developed 1960s • Back then, each IC cost $1000 • Today, costs just tens of cents V C C I 14 I 13 I 12 I 11 I 10 I 9 I 8 I C I 1 I 2 I 3 I 4 I 5 I 6 I 7 GND

  2. 7400-Series Logic ICs

  3. n k p n w s b ( ) (b) Decompose into 2-input AND gates Using Logic ICs • Example: Seat belt warning light using off-the-shelf 7400 ICs • Option 1: Use one 74LS08 IC having 2-input AND gates, and one 74LS04 IC having inverters (a) Desired circuit 14 13 12 11 10 9 8 I I I I I I I k (c) Connect ICs to create desired circuit p w 74LS08 C I s 1 2 3 4 5 6 7 I I I I I I I w a ( ) k p 14 13 12 11 10 9 8 I I I I I I I s 74LS04 C I 1 2 3 4 5 6 7 I I I I I I I c ( ) a a

  4. 0 p k p w 0 s b ( ) Converting to 3-input NOR gates Using Logic ICs • Example: Seat belt warning light using off-the-shelf 7400 ICs • Option 2: Use a single 74LS27 IC having 3-input NOR gates k p w s w 14 13 12 11 10 9 8 I I I I I I I s k a ( ) 74LS27 C I 1 2 3 4 5 6 7 I I I I I I I 0 c ( ) Connecting the pins to create the desired circuit a a

  5. Other Technologies 1 2 3 I I I • Simple Programmable Logic Devices (SPLDs) • Developed 1970s (thus, pre-dates FPGAs) • Prefabricated IC with large AND-OR structure • Connections can be "programmed" to create custom circuit • Circuit shown can implement any 3-input function of up to 3 terms • e.g., F = abc + a'c' O1 PLD C I programmable nodes

  6. 1 2 3 I I I O1 PLD C I programmable nodes Programmable Nodes in an SPLD • Fuse based – "blown" fuse removes connection • Memory based – 1 creates connection p r o g r ammable node Fuse based ( a ) F use "unbl o wn" fuse "bl o wn" fuse Memory based mem mem 1 0 ( b )

  7. k p s B elt W a r n k kps' p w × × w s × × × × × × PLD C I PLD Drawings and PLD Implementation Example • Common way of drawing PLD connections: • Uses one wire to represent all inputs of an AND • Uses "x" to represent connection • Crossing wires are not connected unless "x" is present 1 2 3 I I I wired AND * 3 2' I I × × O1 PLD C I • Example: Seat belt warning light using SPLD × × × 0 0 Two ways to generate a 0 term

  8. 1 2 3 1 2 3 I I I I I I programmable bit O1 O1 FF O2 O2 FF PLD C PLD C I I clk a b ( ) ( ) PLD Extensions Two-output PLD PLD with programmable registered outputs

  9. More on PLDs • Originally (1970s) known as Programmable Logic Array – PLA • Had programmable AND and OR arrays • AMD created "Programmable Array Logic" – "PAL" (trademark) • Only AND array was programmable (fuse based) • Lattice Semiconductor Corp. created "Generic Array Logic – "GAL" (trademark) • Memory based • As IC capacities increased, companies put multiple PLD structures on one chip, interconnecting them • Become known as Complex PLDs (CPLD), and older PLDs became known as Simple PLDs (SPLD) • GENERALLY SPEAKING, difference of SPLDs vs. CPLDs vs. FPGAs: • SPLD: tens to hundreds of gates, and usually non-volatile (saves bits without power) • CPLD: thousands of gates, and usually non-volatile • FPGA: tens of thousands of gates and more, and usually volatile (but no reason why couldn't be non-volatile)

  10. Technology Comparisons Full-custom Standard cell (semicustom) Gate array (semicustom) FPGA PLD Quicker availability Faster performance Lower design cost Higher density Lower power Larger chip capacity Easier design More optimized

  11. C us t om (2) (1) p r o c essor M o r e optimi z ed Easier desi g n P r o g r ammable (4) (3) p r o c essor PLD FPGA G a t e S tanda r d F ull - cus t om a r r a y c ell Technology Comparisons (1): Custom processor in full-custom IC Highly optimized (2): Custom processor in FPGA Parallelized circuit, slower IC technology but programmable Processor varieties (3): Programmable processor in standard cell IC Program runs (mostly) sequentially on moderate-costing IC (4): Programmable processor in FPGA Not only can processor be programmed, but FPGA can be programmed to implement multiple processors/coprocessors IC technologies

  12. Key Trend in Implementation Technologies • Transistors per IC doubling every 18 months for past three decades • Known as "Moore's Law" • Tremendous implications – applications infeasible at one time due to outrageous processing requirements become feasible a few years later • Can Moore's Law continue?

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