M-CORE Introduction
Download
1 / 19

M-CORE Introduction - PowerPoint PPT Presentation


  • 99 Views
  • Uploaded on

M-CORE Introduction. Topic Overview Comparison to Comp-Arch 1 topics Register Files Execution / Function Unit Elements Instruction Set / Execution Core Implementation General Implementation MMC2001 Other MCUs ARM7 THE PIC!!!!!!. Embedded Processors.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'M-CORE Introduction' - elvina


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
Slide1 l.jpg

M-CORE Introduction

  • Topic Overview

  • Comparison to Comp-Arch 1 topics

    • Register Files

    • Execution / Function Unit Elements

    • Instruction Set / Execution

  • Core Implementation

    • General Implementation

    • MMC2001

  • Other MCUs

    • ARM7

    • THE PIC!!!!!!


Slide2 l.jpg

Embedded Processors

  • Embedded vs. Desktop Processors

  • Advantages:

    • Lower cost

    • Optimized Instruction Set

    • Lower Power consumption

    • Smaller footprint

  • Disadvantages:

    • Slower clock speeds

    • Less Processing power

  • Applications

  • Embedded Processors:

    • Cell phones / pagers / PDAs

    • DAQ

    • Controls (Automotive, Industrial)

    • “Smart” Media

  • Desktop Processors:

    • Desktop computers

    • Notebook computers / Laptops



Slide4 l.jpg

Register File

  • User Programming Model

  • 16 X 32 bit General Purpose Registers

  • 32 bit Program Counter (PC)

  • Carry Flag (C Bit)

  • Supervisor Programming Model

  • 16 X 32-bit alternate register file

  • Processor and Global status registers (PSR/GSR)

  • Vector base register (VBR)

  • Exception saved Special Function Registers

  • Five 32-bit supervisor scratch registers (SS0-SS4)

  • Global Control Register (GCR)



Slide6 l.jpg

Execution Unit Elements

  • Hardware

  • 32 bit ALU

  • 32 bit Barrel Shifter

  • Support Hardware for Multiplication

  • Performance

  • All instructions executed in single cycle except:

    • Multiply

    • Unsigned Divide

    • Signed Divide


Slide7 l.jpg

Instruction Execution

  • 4 level pipeline

    • Instruction Fetch

    • Instruction Decode / Reg File Read

    • Execute

    • Reg File Write


Slide8 l.jpg

Instruction Set Overview

  • Instruction Types

  • Data

  • Byte / Bit Manipulation

  • Logical

  • Shifts (Rotates)

  • Load and Store

  • Control

  • Conditional

  • Arithmetic

  • Special

Monadic Instruction Format

Dyadic Instruction Format

Examples:

ABS (Absolute Value – Monadic)

XOR (Exclusive OR – Dyadic)


Slide9 l.jpg

Exception Processing

  • Exception Types

  • Reset

  • Misaligned access

  • Access error

  • Divide by zero

  • Illegal instruction

  • Privilege violation

  • Trace

  • Breakpoint

  • Unrecoverable error

  • Soft reset

  • Interrupt

  • Fast interrupt

  • Hardware accelerator

  • Trap instructions

  • Exception Handling

  • Save PSR and PC to shadow registers (FPSR / FPC for fast interrupts, EPSR / EPC for all others)

  • Determine Vector Number of Exception

  • Determine Address of the First Instruction of Exception and Pass Control to Handler, Load PC and PSR with new values


Slide10 l.jpg

Special Features

  • Power Management

  • Power Saving Instructions WAIT, DOZE, and STOP

  • Compact die (2.2 mm2)

  • Minimized Logic and Routing Capacitance

  • Gated Clocks

  • Effective access to Internal and External Memory

  • Hardware Accelerator Interface (HAI)

  • Support for task acceleration by external hardware

  • Data is Transferred between core and accelerator block by appropriate interface

  • Acceleration blocks may be a counter, high speed multiply/accumulate or data encryption

  • Debug Interface

  • M-CORE Supports on chip emulation (OnCE) allowing a user to examine registers, memory or on-chip peripherals


Slide11 l.jpg

Implementation

M-CORE: More then just a CPU core

MLB – M-CORE Local Bus

PIG – Peripheral Interface Gasket

PIG Bus – Peripheral Bus

MIG – Module Interface Gasket

EIM – External Interface Module

PIE – PIG, Interrupt Control, EIM

MIM – M-CORE Integration Module


Slide12 l.jpg

Implementation–MMC2001

  • MMC2001 Includes:

  • M-CORE 32 Bit Processor

  • 256 K-Byte ROM

  • 32 k-Byte SRAM with battery backup support

  • External Interface Module

    • 20 Address / 16 Data Lines

  • Timer/Reset Module

    • Time of Day timer

    • Watchdog Timer

    • Reset unit

  • 2 Independent UART Modules

  • 6 Independent PWM Modules

  • Serial Peripheral Interface (SPI) Bus

  • OnCE Debugger Module


Slide13 l.jpg

M-CORE Key Advantages

  • High Code Density

    • 30% less memory than most 32 bit CPUs

  • Low Power

    • 1.8 to 3.6 V currently

    • 0.9 V near future

  • Several peripherals on chip

  • Easy interface form the core to:

    • communication hardware

    • memory


  • Slide14 l.jpg

    M-CORE – Disadvantages

    • Compared to other embedded processors, M-CORE really isn’t all it is hyped up to be!

      • Motorola support is very poor

        • Difficult to navigate website

        • Poor documentation

      • Motorola development tools are non-existent (or hard to find) Very poor selection

        • MMC2001

        • MMC2107

      • Most features M-CORE prides itself on are “Future developments”






    References l.jpg
    References

    http://www.motorola.com/SPS/MCORE/

    http://www.digikey.com

    http://www.arm.com/armtech/ARM7_Thumb?OpenDocument

    http://www.microchip.com/1010/index.htm

    Microchip Technologies 4th Quarter 2001 Product Line Card


    ad