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Introduction to ADC testing I Definition of basic parameters

Introduction to ADC testing I Definition of basic parameters. J á n Š aliga Dept. of Electronics and Telecommunications Technical University of Kosice, Slovakia. Agenda. Introduction Deterministic and probabilistic models Basic static parameters Basic dynamic parameters Other parameters.

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Introduction to ADC testing I Definition of basic parameters

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  1. Introduction to ADC testing IDefinition of basic parameters Ján Šaliga Dept. of Electronics and Telecommunications Technical University of Kosice, Slovakia

  2. Agenda • Introduction • Deterministic and probabilistic models • Basic static parameters • Basic dynamic parameters • Other parameters

  3. A/D converter – A/D interface A/Dinterface Reference and power sources Signal condi-tioning S&H(optional) x ADC ADC Buffer Timing and control circuit

  4. ADC parameters (characteristics & errors) • Static (quasistatic) parameters – derived from transfer characteristic • Point (gain, gain error, offset, missing code, ...) • Function (transfer characteristic, INL, DNL, ...) • Dynamic parameters – characterize a behavior of ADC at time-varying signals • SINAD, ENOB, SNR, SFDR, THD, IMD, ... • ADC parameter testing requires extraordinaire accuracy • E.g.: 12-bit ADC: detetermination of transition level with uncertainty < 1% →uncertainty of measurement < 1/(100*4096) ~ 0,00025%=2,5ppm of ADC FS

  5. Accuracy versus precision

  6. 111 110 101 100 011 010 001 000 ADC transfer characteristic Gain (slope) error Inputcodek T[k] - transition level (thresholdofcodek), W[k]= T[k]- T[k-1] – code bin width N – nominal resolution (number of bits) of ADC Non-linearity Ideal and real straight lines Input analogue valuex(t) [Vfs/Q] Missingcode -4 -3 -2 -1 0 1 2 3 4 Ideal ADC Error in monotonicity Real ADC Vfs - full scale range Vfs = Vref(2N-1)/(2N) Offseterror

  7. Gain and offset + their errors • Fitting the straight line: • End points straight line - connecting the two end code transition or code midstep values • Least-square fit straight line according a least-square fitting algorithm • Minimum-maximum straight line - the line which leads to the most positive and the most negative deviations from the ideal straight line

  8. Deterministic model Stochastic model Output code k Output code k 111 101 110 Input analogue 101 value 100 N [ V /2 ] fs 100 Input P ( k | x ) 0 1 1,5 2 analogue - 4 - 3 - 2 - 12 Input x x x ( ( ( t) t) t) value 011 analogue Deterministic definition value 010 N [ V /2 ] fs Channel profile 001 Stochastic definition 1 000 N [ V /2 ] fs N = k 0, 1, ..., 2 -1 ADC transfer characteristic 1 0 1 2 3 4 Conditional probability

  9. ] - [ W k Q nom ] = [ DNL k Q nom ] - ] [ [ T k T k nom ] = [ INL k Q nom DNL and INL • Differential non-linearity • Integral non-linearity

  10. Dynamic parameters I • Bandwidth (BW) - the band of frequencies of input signal that the ADC under test is intended to digitize with nominal constant gain. It is also designated as the Half-power Bandwidth, i.e., the frequency range over which the ADC maintains a dynamic gain level of at least 3 dB with respect to the maximum level. • Gain flatness error (G(f)) - the difference between the gain of the ADC at a given frequency in the ADC bandwidth, and its gain at a specified reference frequency, expressed as a percentage of the gain at the reference frequency. The reference frequency is typically the frequency where the bandwidth of ADC presents the maximum gain. For DC-coupled ADCs the reference frequency is usually fref = 0.

  11. Quantisation noise and errors • Caused by rounding in quantisation process (and ADC non-linearity) • Power of quantisation noise for ideal ADC (s2eq, h2rms) • Is it dependent/independent on input signal? • Is the value Q2/12 correct? • Distribution? Answer: see the simulation

  12. ADC noise and distortion • ADC output random noise – random signal: • Quantisation noise - uniform • Noise generated in input analogue circuits - Gaussian • Noise caused by sampling frequency jitter and aperture uncertainty (Kobayashi) • Spurious – unwanted deterministic spectral components uncorrelated with input signal (e.g. 50Hz) • Total noise – any deviation between the output signal (converted to input units) and the input signal, except deviations caused by linear time invariant system response (gain and phase shift), harmonics of the fundamental up to the frequency fm, or a DC level shift. • Distortion – new unwanted deterministic spectral components correlated with input signal

  13. Noise floor • determines the lowest input signal power level which is reliably detectable at the ADC output, i. e., it limits the ultimate ADC sensitivity to the weak input signals, since any signal whose amplitude is below the noise floor (SNR < 0 dB) will become difficult to recover.

  14. Dynamic parameters IISignal to noise and distortion ratio • SINAD:for a pure sinewave input of specified amplitude and frequency, the ratio of the rms amplitude of the ADC output fundamental tone to the rms amplitude of the output noise, where noise is defined as to include not only random errors but also non-linear distortion and the effects of sampling time errors, i.e., the sum of all non-fundamental spectral components in the range from DC (excluded) up to half the sampling frequency (fs/2).

  15. Dynamic parameters IIISNR • Signal to noise ratio (SNR) - harmonic signal power (rms) to broadband noise power ratio excluding DC, fundamental, and harmonics

  16. Dynamic parameters IVTHD, THD+noise, IMD • THD • THD+noise = 1/SINAD • Intermodulation distortion (IMD) - for an input signal composed of two or more pure sinewaves, the distortion due to output components at frequencies resulting from the sum and difference of all possible integer multiples of the input frequency tones.

  17. Dynamic parametersVEffective Number of Bits • Effective Number of Bits (Nef, ENOB) - for a sinusoidal input signal, Nef is defined as: • where hrms is the rms total noise including harmonic distortion and seq the ideal rms quantisation noise for a sinusoidal input. (SINADdBFS = SINADdB - 20log(SFSR))SFSR – signal to full scale ratio • Nefcan be interpreted as follows: if the actual noise is attributed only to the quantisation process, the ADC under test can be considered as equivalent to an ideal Nef-bit ADC insofar as they produce the same rms noise level.

  18. Dynamic parametersVISFDR • Spurious-free dynamic range (SFDR) - expresses the range, in dB, of input signals lying between the averaged amplitude of the ADC's output fundamental tone, fi, to the averaged amplitude of the highest frequency harmonic or spurious spectral component observed over the full Nyquist band, for a pure sinewave input of specified amplitude and frequency, i.e., max{|Y(fh)| , |Y(fsp)|}: • where: Yavm is the averaged spectrum of the ADC output, fiis the input signal frequency, fh and fsp are the frequencies of the set of harmonic and spurious spectral components.

  19. Dynamic parametersVIIExperimental demonstration • Measurement setup (run generator first and then demonstration) Sound out NI USB 6009 ADC: 12 bits, 10kHz, differential AI1 (DUT) USB • Software (LabVIEW): • Sinewave generator = Sound card • Control: AI1 = DUT (FS, record)Data processing and visualisation

  20. Other parameters • Various electrical parameters, e.g. input impedance, power requirements, grounding, … • Time parameters, e.g. clock frequency, conversion time, sampling frequency, … • Digital output: data coding, levels (logic), serial/parallel, error bit rate, … • …

  21. Introduction to ADC testing IIBasic standardized test methods

  22. Agenda • Standardization • Static test method • Histogram test • Dynamic test with data processing in time domain • Dynamic test with data processing in spectral domain

  23. Standardization • IEEE Std. 1057 - 1994, "IEEE Standard for Digitizing Waveform Recorders", • IEEE Std. 1241 - 2000, "IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters • European project DYNAD – SMT4-CT98-2214, „Methods and draft standards for the DYNamic characterisation of Analogue to Digital converters“http://www.fe.up.pt/~hsm/dynad • IEC Standard 62008 “Performance characteristics and calibration methods for digital data acquisition systems and relevant software” • Additional and related standards: • IEEE Standard on Transition and Pulse Waveforms, Std-181-2003 (IEC 60469-1, -2) • IEEE and IEC standards for DAQ and ADM – in preparation • IEC 60748 - covers only static ADC and DAC operations • … • Detail overview of standards and standardisation – see the lecture of Pasquale Arpaia: A/D and D/A Standards, CD from SS on DAQ 2005 • Standard comparison: Sergio Rapuano: Figures of Merit for Analog-to-Digital Converters: Analytic Comparison of International Standards, In Proc. of IMTC 2006, Sorrento, Italy, pp. 134-139

  24. ADC static testStandardized method

  25. ADC static test - basic ideas • Yields ADC transfer characteristic • Static point and function parameters can be derived and calculated: • Gain, offset, FS, DNL, INL, … • Based on the stochastic model of ADC • Simple test setup – DC voltmeter is the only accurate instrument • Time consuming – each T[k] is determined individually. The total time: 2N x longer than determination of one T [k]

  26. Static test setup (IEEE 1057)

  27. ADC static test - algorithm • Start with the code k = 1 • Find an input voltage level for which the probability of codes lower than k in the record is slightly higher than 0.5 – the voltage is below T[k]. • Find a bit higher voltage (the usual step is a quarter of Q) for which the probability of codes lower than k is slightly lower than 0.5 – the voltage is above T[k] • Fit these two point by line and calculate the voltage for which the probability of codes smaller than k is 0.5 – this is the transition level of code k– the voltage equal to T[k] • Repeat the procedure for all k = 1, 2, …., 2N-1 – the complete transfer characteristic will be measured out

  28. Uncertainty in the static test • The uncertainty can be reduced by increasing the number of acquired samples (M). • The table shows the measurement precision for a confidence level of 99,87%.

  29. The main disadvantage of the static testing • The test is long time consuming: • Let’s test 16bit ADC with sampling frequency 10kHz, testing step is Q/4, additive noise: s=1LSB, required precision: better than 10%. • The chosen record length: 2000 samples • Measurement on one level takes2000 x 0.1ms = 0.2s • Total required time: 0.2s x 2(16+4)= 58.2 hours!!!

  30. Static test Experimental demonstration • Measurement setup (run demonstration) NI USB 6009 ADC: 12 bits, 10kHz, differentialDAC: 12 bit, static, RSE AI0 (DUT) USB AI1 (Voltmeter) • Software (LabVIEW) controls: • AO0 = DC test voltage • AIO = DUT - FS, record • AI1– virtual DC voltmeter with averaging • Statistical data processing and visualisation 1:10 AO0 (DC source)

  31. Alternative static methodwith feedback - IEEE 1241

  32. Alternative static methodwith feedback - IEEE 1241

  33. Some experimental results INI USB 6008 (12 bits, 10kHz, 10000s/T)

  34. Some experimental results IINI USB 6008/9 (10000s/T) Difference of two following measurements Switching monitor during the measurement

  35. Histogram (statistical) testStandardized method

  36. Histogram (statistical) testBasic ideas I • Goal: to determine ADC transfer characteristic (the same as in static test method) • The calibrating signal is a time invariant repetitive signal covering the ADC full scale • The stream of ADC output codes is recorded • Histogram is built from the record • The relative count of hits in code bin k in the histogram in comparison to the calibrating signal probability density function (or counts for code bin k in cumulative histogram in relation to signal probability distribution function) gives information about the code bin width (or code transition levels)

  37. Histogram (statistical) testBasic ideas II • The best shape would be ramp or triangular signal. Why?Problem? • The basic recommended signal by all standards: sinewave. Why? • To achieve a required accuracy a relative long record (or records) is required • Faster than the static test • Requirement: an accurate generator with an extremely high accuracy (low distortion, high linearity, high spectral purity)

  38. Histogram (statistical) testGeneral test setup

  39. Ramp signal (IEEE 1241) T[k]=C+G.HC[k-1]/S for k=1, 2, .... , (2N- 2) G is a gain factor, C is an offset factor, The code bins 0 and 2N-1 are usually excluded from data processing (why?)

  40. Sinewave signal(All standards) – theoretical background I • Signal: • Densityof probability: • Distribution of probability:

  41. Sinewave signal(All standards) – theoretical background I • Ideal theoretical histogram: • DNL: • Transition levels:

  42. Sinewave signal(All standards) – theoretical background II • Problem in praxis: what are the sinewave parameters – A, C →Hid[k]? • Various ways of estimation, e.g Dynad: • Incorrectestimation →error ingain and offset

  43. Sinewave signalTest conditions I • The total record must contain exactly an integer number J of sinewave cycles • R partial records can be used instead of one long record • Total recorded number M of samples must be relatively prime with J, i.e. they have no common factor • Then the sampling and sinewave frequency are:

  44. Sinewave signalTest conditions II • The number of samples (M) to acquire in the histogram test, depends on: • The noise level in the measurement system, • The required tolerance (B is measured in LSBs) and confidence level (a) and the M is different if DNL (quantization interval) or INL (transition levels) it to be determined. • The specification of tolerance for an individual transition level or code bin width, or for the worst case in all range.

  45. Sinewave signalTest conditions III • The equation generally used to determine the number of records to acquire is: J=1 for INL, J=2 for DNL, s is the standard deviation of noise level in volt for the INL determination and the smaller of the values of s and Q/1,1 for the DNL determination.

  46. Sinewave signalSimulation • Simulation = (see the simulation): • Form of histogram for various test signals • Error caused by limited number of samples • Error caused non-coherent sampling • Error caused by noise in input signal • Error caused by higher harmonics • …

  47. Histogram test Experimental demonstration • Measurement setup (run generator first and then demonstration) Sound out 1:2 NI USB 6009 ADC: 12 bits, 10kHz, differential AI1 (DUT) USB Software (LabVIEW): Sinewave generator = Sound card AI1 control = DUT - FS, record Data processing and visualisation

  48. Results of experimental testsComparison generators (USB 6009) Stanford DS 360 (20-bits, 100 mil. samples) Agilent 33220A (14-bits, 100 mil. samples)

  49. Histogram (statistical) testSome non-standardized methods

  50. Non standardized histogram tests Basic ideas • Reasons: • To use signals that are closer to real signal digitized by ADC in common applications • To use signal that can be simply generated with required precision • Common signals: • Gaussian noise • Exponential signal • Uniform noise, small sinewave or triangular with DC steps, …

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