1 / 11

Review Week1

Review Week1. Week2 Outline. Basic Architecture – BUS. Basic Architecture: Personal Computer. Memory bus. VESA PCI EISA ISA Bus USB. Microprocessor. Memory. Graphic Card. Northbridge. Memory. USB. PCI/PCIe. IDE/Parallel ATA. Southbridge. Ethernet. Serial ATA. Figure 2.

edolie
Download Presentation

Review Week1

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Review Week1 UPM ECC3105 S1-12/13

  2. Week2 Outline • Basic Architecture – BUS UPM ECC3105 S1-12/13

  3. Basic Architecture: Personal Computer Memory bus VESA PCI EISA ISA Bus USB UPM ECC3105 S1-12/13

  4. Microprocessor Memory Graphic Card Northbridge Memory USB PCI/PCIe IDE/Parallel ATA Southbridge Ethernet Serial ATA Figure 2 Basic Architecture: Personal Computer (cont.) UPM ECC3105 S1-12/13

  5. Basic Architecture: Bus Note that Pentium system bus architecture is more complex that this. UPM ECC3105 S1-12/13

  6. Basic Architecture: Bus (cont.) • Address: • If I/O, a value between 0000H and FFFFH is issued. • If memory, it depends on the architecture: • 20-bits (8086/8088) • 24-bits (80286/80386SX) • 25-bits (80386SL/SLC/EX) • 32-bits (80386DX/80486/Pentium) • 36-bits (Pentium Pro/II/III) • Data: • 8-bits (8088) • 16-bits (8086/80286/80386SX/SL/SLC/EX) • 32-bits (80386DX/80486/Pentium) • 64-bits (Pentium/Pro/II/III) • Control: • Most systems have at least 4 control bus connections (active low). • MRDC (Memory Read Control), MWRC, IORC (I/O Read Control), IOWC UPM ECC3105 S1-12/13

  7. Basic Architecture: Bus Standards • ISA (Industry Standard Architecture): 8 MHz • 8-bit (8086/8088) • 16-bit (80286-Pentium) • EISA: 8 MHz • 32-bit (older 386 and 486 machines). • PCI (Peripheral Component Interconnect): 33 MHz • 32-bit or 64-bit (Pentiums) • New: PCI Express and PCI-X 533 MTS • VESA (Video Electronic Standards Association): Runs at processor speed. • 32-bit or 64-bit (Pentiums) • Only disk and video. Competes with the PCI but is not popular UPM ECC3105 S1-12/13

  8. Basic Architecture: Bus Standard (cont.) • USB (Universal Serial Bus): 1.5 Mbps,12 Mbps, 480 Mbps and now 5Gbps. • Newest systems. • Serial connection to microprocessor. • For keyboards, the mouse, modems and sound cards. • To reduce system cost through fewer wires. • AGP (Advanced Graphics Port): 66MHz • Newest systems. • Fast parallel connection: Across 64-bits for 533MB/sec. • For video cards. • To accommodate the new DVD (Digital Versatile Disk) players. • Latest AGP 3.0 with peak bandwidth of 2.1GB/s. UPM ECC3105 S1-12/13

  9. Inside your iPhone…

  10. ECC3105 Assignment 1 (Deadline: 26/09/2012, 0900hr) • Task: • Based on the given picture, please label the components appropriately. • Give the definition of Moore’s Law and its relation to our course. • Some says Moore’s Law will get to an end. Name the reasons why Moore’s Law will end? • Please give at least 3 answers for each question: • Why do we need to learn about microprocessors. • What do you aspect to learn from microprocessor course. UPM ECC3105 S1-12/13

  11. Figure 1 PC platform • Connector for peripherals • CPU • Northbridge (w/ heat sink) • 20-pin ATX power connector • RAM memory slot • FDD connector • AGP Slot • CMOS battery backup • IDE connector (2x) • BIOS chip • Southbridge • PCI slot • PCI-express slot UPM ECC3105 S1-12/13

More Related