Lecture 2 design abstraction
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Lecture 2 Design Abstraction. Prepare Reading 1:(for lecture 3) An Introduction to Asynchronous Circuit Design. Design Abstraction. English executable program Register Transfer Language gates transistors rectangles. specification. system throughput design time function units

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Lecture 2 Design Abstraction

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Lecture 2Design Abstraction

Prepare Reading 1:(for lecture 3)An Introduction to

Asynchronous Circuit Design


Design Abstraction

English

executable

program

Register Transfer

Language

gates

transistors

rectangles

specification

system throughput

design time

function units

clock cycles

literals

gate depth

nanoseconds

microns

behavior

RTL

logic

circuit

layout


CAD Tools

specification

Cadence,

Synopsis,

Mentor Graphic,

Viewlogic,

Java, C++, ..

VHDL, Verilog, ..

SIS

SPICE, TimeMill,..

Magic, Layout Editor,

Tanner, ...

behavior

RTL

logic

Realization

and

Complexity

circuit

layout


RTL : VHDL

Architecture RTL of NAND2 is

begin

process (A,B)

begin

if (A=‘1’) and (B=‘1’) then

Z<=‘0’;

else

Z<=‘1’;

endif;

end process;

end RTL

A

B

Z


Gate Level

Symbol

Name

AND

OR

NOT

NAND

Function

A

B

A

B

A

A

B

x

x

x

x

x=AB

x=A+B

x=A’

x=(AB)’


Gate level

  • Netlist

  • (and A (or B C))


Transistor Level

  • PMOS

  • NMOS

S

D = S

D = S

G=0

G=1

G

D

D

G

S


CMOS : Inverter

  • Inverter

B

A

B

A

1

A= 0

B=1

A=1

B=0

0


CMOS : NAND

A

B

  • NAND

C=(AB)’

C

(1) A=1 B=1 C=0 (2) A=0 B=0 C=1 (3) A=1 B=0 C=1

B

B

B

A

A

A

C

C

C

A

A

A

B

B

B


CMOS: OR

A

B

  • OR

C=A+B

C

A=0 B=0 C=0

A=1 B=1 C=1

A

B

A

A

B

A

B

B

  • NOR: OR without inverter


Layout : Inverter

  • Inverter

B

A

B

A

A

B

1

0


Muller C-element

  • Transition diagram

  • Symbol

A

B

A

B

C

C

  • True Table

A B C

0 0 0

1 0 unchanged

0 1 unchanged

1 1 1


Muller C-element

  • C-element CMOS implementation

A=0 B=0 C=0

A=1 B=1 C=1

A

B

A

B

C

C

A

B

A

B


Muller C-element

  • C-element CMOS implementation

A=0 B=1 C=unchanged

A=1 B=0 C=unchanged

A

B

A

B

C

C

A

B

A

B


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