1 / 19

Realizations of CMOS Fully Differential Current Followers/Amplifiers

Realizations of CMOS Fully Differential Current Followers/Amplifiers. by Hussain Alzaher and Noman Tasadduq Electrical Engineering Department King Fahd University of Petroleum & Minerals Dhahran, Saudi Arabia. Objective. Present fully differential CF/CA topologies .

eddy
Download Presentation

Realizations of CMOS Fully Differential Current Followers/Amplifiers

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Realizations of CMOS Fully Differential Current Followers/Amplifiers by Hussain Alzaher and Noman TasadduqElectrical Engineering Department King Fahd University of Petroleum & Minerals Dhahran, Saudi Arabia

  2. Objective • Present fully differential CF/CA topologies. • Investigate their characteristics. • Compare and identify the best topology. • Confirm the results using simulation. • Give an application example.

  3. Introduction Why Fully Differential Architecture? Fully differential architectures are essential to enhance the performance of mixed signal applications in terms of • Supply noise rejection. • Dynamic range. • Harmonic distortion.

  4. Introduction • Theory behind fully differential opamp realization is well established. • Current Amplifier is the core analog building block for current mode circuits. Its fully differential realization is still under research.

  5. Introduction Current Amplifier (CA)/Current Follower (CF) • Conveys input current from a low impedance input terminal (X) to a high impedance output terminal (Z). • For a CA, current is conveyed with gain K. • CF is a special case of CA in which gain (K) equals one. • Can be classified as positive (input and output currents are both going in the same direction) or the negative type (having currents in opposite directions). CA with +ve output CA with -ve output

  6. Low Power Current Amplifier Single Input Dual Output Class-AB CA/CF Izp = -Izn = KIx Vx=0

  7. Fully Differential CA (FDCA) • Four terminal device, with two input and two output currents. • Differential output current can be expressed as, • Ideally, Acm = 0.

  8. FDCA Topologies Topology ‘b’ Topology ‘a’ Adiff=2K Adiff =2K Topology ‘c’ Adiff =K

  9. and CF1 ideal i.e. if, FDCA Topologies Non-ideal Differential mode gain Topology ‘a’ Non-Ideal Common mode gain Advantages • Lowest power consumption as compared to other two topologies. Disadvantages • Error in Kp1 causes finite common mode output. • When current gain Kp1 is represented by first order lowpass model, common-mode gain exhibits highpass response. • Not suitable for high frequency applications.

  10. FDCA Topologies Non-ideal Differential mode gain Topology ‘b’ Non-ideal Common mode gain Advantages • Lower power consumption than topology ‘c’. • Widest bandwidth (as will be shown in simulation results) • Symmetric input and output resistances. Disadvantages • Slightly higher power consumption than topology ‘a’. • Lower output resistance as compared to topologies ‘a’ and ‘c’.

  11. FDCA Topologies Advantages Topology ‘c’ • Smallest input R. • Output R= twice that of ‘b’ Disadvantages • Highest power consumption. • Most no. of active elements. Ideal differential gain Io1=K(I1b-I2a) and Io2= K(I2b-I1a) Io= K(I1b-I2a)-K(I2b-I1a)=K(I1b+I1a)-K(I2a+I2b)=K(I1-I2) Non-ideal Differential mode gain Non-ideal Common mode gain

  12. Simulation Results • Biasing Conditions • TSMC 0.18mm CMOS process. • Supply voltage = ±1.5V. • IBP=40µA and ISB=10µA.

  13. Simulation Results Differential-mode DC operation for the three topologies All three topologies have comparable DC performance

  14. Simulation Results Differential-mode AC response for the three topologies Topology ‘a’ 57MHz Topology ‘b’ 77MHz Topology ‘c’ 36MHz Topology ‘b’ has the widest bandwidth

  15. Simulation Results Ideal Common-mode AC responses Topology ‘b’ and ‘c’ have excellent common-mode response. Topology ‘a’ has common mode gain dependent on frequency.

  16. Application Example Fully Differential Current-Mode Sallen-Key Highpass filter Using Topology ‘b’

  17. Application Example Magnitude response of the Sallen-Key Highpass filter Results in good agreement

  18. Conclusion Topology ‘a’ +: Least power consumption. - : Freq. dependent Acm. Topology ‘c’ +: Best Rin and Rout. - : Power consumption and area are highest. - : Differential-mode bandwidth is narrowest. - : Mismatch results show freq. dependent Acm. Topology ‘b’ -+: Consumes slightly more power than ‘a’ but much lower than ‘c’. +: Widest differential-mode bandwidth. +: Frequency independent common-mode gain. • Best solution for high freq. applications.

  19. THANK YOU

More Related