1 / 32

Measurements of the first ON Semiconductor production wafers at Udine

Measurements of the first ON Semiconductor production wafers at Udine. Prepared by Diego Cauz on behalf of the group of Udine April 2004 Udine. Measurement speed-up. Doctor Sergey Gorokhov is back in Udine since April 14th. He will stay for 3 months. ON-Semic wafers in Udine.

edana
Download Presentation

Measurements of the first ON Semiconductor production wafers at Udine

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Measurements of the first ON Semiconductor production wafers at Udine Prepared by Diego Cauz on behalf of the group of Udine April 2004 Udine

  2. Measurement speed-up • Doctor Sergey Gorokhov is back in Udine since April 14th. • He will stay for 3 months Atlas Pixel Italia Apr 2004

  3. ON-Semic wafers in Udine • We have received 11 ON Semiconductor wafers in April: • 2 partially measured for quick shipping to AMS Atlas Pixel Italia Apr 2004

  4. Visual inspection (VIS)(1/3) Mask Align (H-V) Wafer n-side L n-side R p-side Lp-side R ID marking Atlas Pixel Italia Apr 2004

  5. Visual inspection (VIS)(2/3) Mask Align (H-V) Wafer n-side L n-side R p-side Lp-side R ID marking Bad passivation vernier in the 4th vernier pair on all 4 monitors, both H and V, all wafers. See next slide Atlas Pixel Italia Apr 2004

  6. Atlas Pixel Italia Apr 2004

  7. Many defects, probably scratches on the tiles of 9688-07 Tile 1: 8 scr.s -93 pix Tile 2: 4 scr.s -20 pix Tile 3: 9 scr.s -122 pix Atlas Pixel Italia Apr 2004

  8. Wetting residue Atlas Pixel Italia Apr 2004

  9. Visual inspection (VIS)(3/3) *: AMS communication ~: bad on limited areas Atlas Pixel Italia Apr 2004

  10. 9688-10 Atlas Pixel Italia Apr 2004

  11. 1203-11 Atlas Pixel Italia Apr 2004

  12. Thickness measurement (THI) 220 mm < th < 260 mm Dth < 10 mm Wafer th1 th2 D (mm) Wafer th1 th2 D (mm) Atlas Pixel Italia Apr 2004

  13. I-V on diode w/ guard ring (IVD) Vbd = max V(I < 25 nA) Iop = I(Vop) Wafer Vbd (V) Iop(nA) Wafer Vbd (V) Iop(nA) Atlas Pixel Italia Apr 2004

  14. C-V on diode w/ guard ring (CVD) (1/2) Measurement very noisy. One cable found defective. Large incertitude on Vdep. Vdep Cdep Vop r Wafer (V) (pF) (V) (W cm) Vop = max(150 V, Vdep + 50 V) Vdep = V(kink in C-V curve) Cdep = C(Vdep) 30 < Vdep (V) < 120 2000 < r (W cm) < 5000 Atlas Pixel Italia Apr 2004

  15. C-V on diode w/ guard ring (CVD) (2/2) Vdep Cdep Vop r Wafer (V) (pF) (V) (W cm) See next slide Vop = max(150 V, Vdep + 50 V) Vdep = V(kink in C-V curve) Cdep = C(Vdep) 30 < Vdep (V) < 120 2000 < r (W cm) < 5000 Atlas Pixel Italia Apr 2004

  16. Atlas Pixel Italia Apr 2004

  17. I-V on tiles (1/2) Wafer Vop (V) Vbd (V) S goodtiles Vbd > Vop S = I(Vop) / I(Vop-50) < 2 Atlas Pixel Italia Apr 2004

  18. I-V on tiles (2/2) Wafer Vop (V) Vbd (V) S goodtiles Bad I-t Vbd > Vop S = I(Vop) / I(Vop-50) < 2 Atlas Pixel Italia Apr 2004

  19. I-V on SC’s Only half of the SC’s are being measured Wafer good/total Wafer good/total Vbd > Vop S = I(Vop) / I(Vop-50) < 2 Atlas Pixel Italia Apr 2004

  20. I-V on MC’s Only half of the MC’s are being measured Wafer good/total Wafer good/total Vbd > Vop S = I(Vop) / I(Vop-50) < 2 Atlas Pixel Italia Apr 2004

  21. I-t on good tiles (ITS) S = Iend / Istart < 1.3 Wafer-tileS Atlas Pixel Italia Apr 2004

  22. delay = 4 s I-V on MOS (BOX) Wafer Vbd (V) Wafer Vbd (V) Vbd = max V(I < 100 pA) > 50 V Atlas Pixel Italia Apr 2004

  23. C-V on MOS (COX) Wafer Cox (pF) Cmin (pF)CFB (pF) VFB (V) Cox = Cmax VFB = V(C nearest to CFB) Atlas Pixel Italia Apr 2004

  24. I-V on gate-controlled diode (IVG) Wafer Itop (pA) Ibot (pA) Iox(pA) Itop = I(VFB +3 V) Ibot = I(VFB – 3 V) Atlas Pixel Italia Apr 2004

  25. COX, IVG discrepancy VFB is around 16 V VFB is around 4 V

  26. I-Vg on MOSFET (MFE) Wafer Vth (V) p-dose (x 1012 cm-2) Vth is usually good, but I beyond threshold is very low. See next slide. Vth = max V(I < 100 nA) > 0 2.2 < p (1012 cm-2) < 3.5 Atlas Pixel Italia Apr 2004

  27. Atlas Pixel Italia Apr 2004

  28. Vpix-V on punch-thru structure (PUT) Vpt >3 V Wafer Vpt (V) Wafer Vpt (V) Atlas Pixel Italia Apr 2004

  29. Conclusions • 11 wafers are being measured • Missing measurements: VIS, PLA • Some measurements need to be done again • Wafer quality : • bad passivation in the mask alignment monitor for all 4th vernier pair, wafers 9688-07, 1203-34 • Many scratches on the tiles of 9688-07 • Bad bump pads for 9688-10 (and 9688-07) • wafer 1203-34 does not pass MFE test • wafer 1203-34, 9688-10 have only one good tile • wafer 1203-27 has no good tile • Almost all wafers do not pass PUT test Atlas Pixel Italia Apr 2004

  30. Conclusions Atlas Pixel Italia Apr 2004

  31. Project Progress Tracking • Dortmund 145/250 58% • New Mexico 0/250 0% • Prague 250/250 100% • Udine 212/250 84% • This tool is not trustable. Laboratory tiles meas/total percent Atlas Pixel Italia Apr 2004

  32. Tile pool • In reality the 4 labs have received a total of 1121 tiles, 1060 of which have been accepted: • Dortmund: 250 • NM: 265 • Prague: 250 • Udine: 212 • The missing tiles are to be finished measuring by Udine (14 wafers) and Dortmund. Atlas Pixel Italia Apr 2004

More Related