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SOC Development Trends in Home Applications

SOC Development Trends in Home Applications. S eh-Woong Jeong April 25 2002 Media SOC Team System LSI Business Samsung Electronics Co., Ltd. Outline of Talk. SOC Development in Samsung System LSI Issues and Trends in Home Networking D VD Players/Recorders Case Study : S5H5002 Q & A.

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SOC Development Trends in Home Applications

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  1. SOC Development Trends in Home Applications Seh-Woong Jeong April 25 2002 Media SOC Team System LSI Business Samsung Electronics Co., Ltd.

  2. Outline of Talk • SOC Development in Samsung System LSI • Issues and Trends in Home Networking • DVD Players/Recorders • Case Study : S5H5002 • Q & A

  3. What is SOC ? Embedded Memory For Data/Program RF/Analog Front End MCU Core DSP Core Whole system in a single package MODEM/ Channel Hardwired Logic Peripheral Interface Logic

  4. Driving Forces for SOC’s • Set makers face tough competition to reduce material cost • New applications need • Low power • Explosive growth of mobile applications • Cellular phones, PDA, ... • Small size • Mobile applications normally mean portability • Reduce number of parts for feature size reduction • High performance • Should cope with system-level complexity • Multi-media applications

  5. Modem SRAM SOC Trend ‘00 ‘01 ~ ‘02 ‘03 ~ ‘05 > 0.25/0.18um 0.13um < 0.10um CPU(Cache SRAM) PC CPU PC 1Chip I/O SOUND 1Chip Graphics(DRAM) Memory Memory Memory including ( MP3+AAC+MS+MPEG4 ) BBA/RF Rx RF Rx BBA Rx HHP (CDMA) BBA/RF Tx RF Tx BBA Tx 1 Chip BBA/RF Rx Modem PLL PLL BBA/RF Tx 4Chip Modem PLL 7Chip DAC+GPS+Bluetooth CDMA2000 1x Audio Decoder TS IEEE1394, PCI Video Decoder OSGM Video On a Chip 5Chip Format Converter DTV 1Chip D-TV Channel Decoder Channel On a Chip 2Chip 2Chip Channel EQ. 2Chip

  6. SOC Key Ingredients of SOC Technology Design Methodology Technology • Platform-based chip design • Static timing verification • HW/SW co-design • IP Reuse • DSM logic process • Embedded memory process IP Cores Firmware/Software SOC Cooperation • Algorithm • Real time OS • Device drivers • System software • Application software • MCU, DSP • DRAM, SRAM, Flash • High speed I/O • Analog/RF cores • Hard / Soft macros Implementation • Product / Test engineering • Packaging technology

  7. SOC Requires Tighter Relationship • Strategic Relationship between Set Makers & Silicon Vendors Getting More Important Than Ever • Early System Requirement Access : Key to Time-to-Market • Working Sample to Design-In : at least 6 months or more  Full Dedication from Both Sides • More System Application Engineers in SOC Vendors 10~20 %  more than 50% of R&D Work Force • Strategic Relationship between Silicon Vendors & IP Vendors • Competitive/Proven IP Portfolio : Bare Minimum for SOC Business • You can’t develop everything for yourself !! • Strategic Relationship between Silicon Vendors & Software • Algorithm Firmware • RTOS/Device Driver/BSP/Application Software Support • Hardware Only Makes No Sense to Set-Makers !!

  8. Cooperation Model Well-Educated Engineers from Academia IP Provider Assembly / Test IP Cores System Idea Process & Fab Design Service System Integration Silicon Vendors Customers Product Eng. SOC’s Algorithm/ Firmware/ Software Design House Software House

  9. Samsung SOC Future Goal SOC 공통 IP (CPU, DSP, 통신/Media IP) SOC Infra (설계방법론, IP Reuse, 인력양성) SOC 개발/연구 IP & Library Product Engineering Design Service Process Tech. Analog Module Package Semiconductor Infra Leading The Digital Era Home Gateway N/B PC PC MP3 Player Home Server IP Terminal Mobile Network Office Network Home Network Wireless PDA Printer DVDP Digital TV Display Mobile Phone 차세대 SOC Solution

  10. Home Networking

  11. Why Home Networking ? From End-User’s Standpoint 9% Remote Monitoring/Security 13% Distributed Video 15% Multiplayer Gaming 17% Home Control 20% Connect Laptop from Work 22% Share Files 23% Share Printers 26% Share Internet 0% 5% 10% 15% 20% 25% 30%

  12. Digital Home Example – Cisco View

  13. Home Networking • Home Server + Home Gateway with • Convenient Access to Internet • Easy Connectivity between Home Appliances • Media Streaming Capability with Mass Storage • Each major company has a different view and its own strategies • PC-Centric View • CE-Centric View

  14. PC-Centric View – Samsung HMC IEEE1394 Ethernet PLC Wireless PAN Home Media Center

  15. CE-Centric View • Home Server + Home Gateway will be • Set-Top Box or D-TV • DVD-Box (DVD Player/Recorder or iDVD) • Game Console : PS3 from Sony • “If Sony's aspirations succeed, then the Playstation 3 will not be a pure video game console, but rather measure the amount of milk left in the fridge, record TV programs to hard-disk, automatically download new software, perform Tera-flop operations and a variety of other things. In short, if one can automate, computerize, network or electrify a process, then the PS3 should be able to take on the task.” • Chances are : some form of a convergence box. For example, • DVD + Set-Top Box with broad-band access capability and mass storage

  16. Key Technologies • Connectivity Technologies • In-House Connectivity : 802.11e (QoS), IEEE1394, … • Out-Door Connectivity : xDSL, Cable Modem, …. • Broadcast Connectivity : VSB, OFDM, QPSK, … • Media Processing Technologies • MPEG2/4 (or H.264) • Pre-/Post-Processing • High Performance CPU/DSP • Middlewares

  17. DVD Players/Recorders

  18. DVD (Digital Versatile/Video Disc/Disk) An Interesting Article from WP ’02.10.07 “DVD, 할리우드의 최대 수익원으로 부상” • '02년 할리우드 영화의 DVD 판매 및 대여수입은 26억달러로 극장수입 17억달러, 비디오 판매 및 대여수입 16억달러를 각각 추월하면서 최대 수익원으로 부상 • DVD수입 급증은 무엇보다 DVDP 보급 증가에 기인 • VCR은 9천만 미국 가구가 보유해 포화 단계인 반면 DVD는 1년 전 천7백만에서 현재 3천백만 가구로 급증 • DVD의 경우 VCR과 달리 소비자들이 타이틀 대여보다 구매를 많이 하는 특성이 있어서 판매 확대가 용이 • DVD 보유가구는 올해 평균 260달러 정도의 16개 DVD 타이틀을 구매하는 반면, VCR 보유가구는 평균 5개의 테이프를 구매 • DVD는 대여료 대비 판매가가 3-5배에 그치고, 반영구적인 화질, 제작과정과 게임 등 다양한 컨텐츠가 있기 때문 • 디즈니 영화 "몬스터"는 전체 극장수입이 2.6억 달러였지만, DVD를 20달러에 출시한 첫 주에 1.4억달러 가치의 7M copies 판매 • DVD는 대량생산이 용이해 제조원가가 적기 때문에 판매 수익도 큼 • 29.98달러에 팔린 "해리포터" DVD에서 영화사 몫은 9.98달러 • 11월 1일 출시될 소니의 "스파이더 맨" DVD는 이미 WalMart에만 19M copies 납품 등 새로운 판매기록을 세울 전망

  19. DVD Player System P/U Deck Mechanism RF (EQ, Digital Detector) EFM+ Demod, ECC Decoder Video Decoder (MPEG) Video System Control CPS Servo (Focus, Tracking, Sled control) Audio Decoder (MPEG, AC3, DTS, MLP) System Control Motor Driver Audio Front-End Back-End

  20. DVD Disc Structures Single sided Disc Single side / Dual Layer 8.5GB Single side / Single Layer 4.7GB Double side / Single Layer 9.4GB Double Side / Dual Layer 17GB Double sided Disc

  21. Optical Disc Evolution • Movement to Higher-Density & Higher-Speed • Movement to Small Form Factor • A smaller disc can store more than 2 hours of Motion Picture in DVD’s quality (50mm BD or 30mm UD)

  22. DVD Recorder Market Trends Worldwide DVDP & DVD Recorder Supply (IDC '02. Oct) • Rapid Market Maturity of Play-Only DVDP • (Market Fall off after ’05 is expected) • Rapid Price Drop of DVDP: 30% / Year • ( $129(’02)  $89(’03)  $59(’04) ) • Market-Shift from VCR to DVD Recorder • (Higher A/V Quality, Affordable Price) • Rapid Market Growth after ’03 is Expected • (Annually more than 200% of Growth) Unit: 1M 100 DVD Play-Only DVD Recorder 32.21 80 19.14 9 60 3.06 0.71 40 0.02 52.2 52.4 48.5 48.7 40.9 20 26.9 0 2001 2002 2003 2004 2005 2006 Popularization of DVDP for Low Price DVDP MarketSaturation Increase of Needs for Recorders Recorder Price Down & Market Formation Unit: 1M

  23. Market Size & Format Competitions • In Worldwide DVD Recorder Market, Japan holds 48%, EU holds 32% and UStakes 13% DVD+RW 50% DVD+RW 41% DVD-RW 20% EU US DVD-RAM 56% DVD-RAM 50% Japan DVD-RAM 80% $699 1.0M 1.4M $499 ◆ Japan - DVD-RAM + HDD product takes50% in RAM market ◆ US - RAM takes 56% in market, +RW increases after ’02.2Q ◆ EU - Philips (DVD+RW)is a major supplier 2.8M $399 $299 3.8M

  24. Recordable Discs & Features Super Multi RAM IBM DVD-Multi Dell, HP Panasonic, Toshiba SAMSUNG, HLDS Ricoh Philips Yamaha Mitsumi + RW - RW SONY NEC Sanyo Pioneer ± RW Apple Sony, Toshiba, Fujitsu

  25. DVD Standardization Body • DVD-Forum • Nov. ’97: Changed from ‘Consortium’, Opened publicly • Members: 212 companies over Content Owners, CE Manufacturers, IT Manufacturers. • Standardized DVD Formats • Logical: DVD-Video, DVD-Audio, DVD-VR, DVD-AR, Streamer • Physical: DVD-ROM, DVD-RAM(3x), DVD-R(4x), DVD-RW(2x) • Discussing proposals for DVD Formats • Logical: Interactive DVD, HD-DVD9, MOST1), iDVD Streamer • Physical: DVD-RAM(5x), DVD-R(8x), DVD-RW(4x), DVD-AOD • BDF (Blue-ray Disc Founders) • Closed consortium to standardize BD-ROM/R/RE format • Member(9 CE companies) + Advisory Group(MPAA, IT, Disc Manufacturer) + Contributors • Media Oriented Systems Transport

  26. iDVD(Interactive DVD) • DVD-Video Contents + Interactive Contents on Disc • JAVA Script, HTML for Interactive Contents • Value Added Service thru Internet Access • Additional Subtitle Service • Game • E-Commerce

  27. Samsung A/V Decoder for DVDS5H5002

  28. Calm16 MAC2424 (Audio) IPC / Format Converter S5H5002 Block Diagram Ethernet conn. SDR SDRAM NOR Flash 32/16 Memory Controller (32bit 117MHz) ARM 940T ATAPI Host/ Parallel Serial A/V IF GPIO 3 2 b i t A P B SPDIF 3 2 b i t A H B P L U S 3 2 b i t A H B P L U S Control registers of IP MPEG Stream Demux Decoder I2S out Control registers of IP Control registers of IP IO DMA UART MPEG2 Video Decoder M1 M1 IR M2 M2 8bit ADC 2D Graphic Accelerator Sub-picture Decoder I2S in BT 656 in/out AHB to APB Bridge SPI Mixer OSD I2C I-Frame Only Encoder Memory stick I/F NTSC/PAL Encoder 5 DAC

  29. Arbitration SDRAM latency Data Transfer Arbitration SDRAM latency Data Transfer Arbitration SDRAM latency Data Transfer Arbitration SDRAM latency Data Transfer Arbitration SDRAM latency Data Transfer Arbitration SDRAM latency Data Transfer Bus Architecture • SDRAM Bandwidth Problem • Bandwidth-hungry masters contending over an external SDRAM • Single 16-bit SDRAM @ 133MHz used for the cost issue  Bandwidth Utilization • Serialized bus transaction in single layer AHB • Utilization = data transfer cycles / total clock cycles • Multi-layer bus is required. • Low SDRAM bandwidth utilization for random access • Access turn around time for each bank : 12 cycles • Maximum utilization : about 60% • Bank interleaving is required. Single Layer Conventional AHB Multi-Layer AHB Multi-Layer AHB with Bank Interleaving

  30. Arbiter Protocol FSM Protocol FSM … Protocol FSM Bus Architecture – AHB+ • Backward Compatible with AHB Bus : IP Reuse • Burst Length Extension (1,2,3,5,6,7,8 beats supported) • Hiding Arbitration Overhead • Bus protocol state machine for each master • Maximize SDRAM Bandwidth Utilization • Bank interleaving is fully utilized • Address Dependent Priority • Arbiter is tightly coupled with the memory controller SDRAM Memory Controller Master 1 Master 2 Master n

  31. Bus Arbitration Scheme • Priority Scheduling with Ages • Preventing starvation of low priority masters • For each master, latency amount is set by software • If latency is more than the amount, priority is incremented. • Important feature for CPU/DSP • Read/Write transaction requests have higher priority after read/write transactions, respectively. (in order to localize the same type of accesses) • Priority Rule • Interface masters have higher priority. • Masters with smaller buffer have higher priority • Usually complex masters need a large buffer. • Masters of higher bandwidth have higher priority • IO DMA > SD Input > VP > FIU > VD > GA

  32. AudioDSP(CalmRISC16+CalmMAC24) • CalmMAC24 : Passive Coprocessor to CalmRISC16 • Single MDS for CalmRISC16 and Coprocessor CalmMAC24 Programming • Generic Coprocessor Instructions Mapped to a Specific Coprocessor Instruction Set, in general Data Memory data 16 X 24 Y 24 Program Memory CalmRISC16 CalmMAC24 command code 16 status

  33. CalmADM Design Objectives • Small Area • Low Bus Access Rate • Efficient Stream Data Processing Caches + Stream Buffers

  34. CalmADM Architecture • Processors: CalmRISC16, CalmMAC24 • Memory Subsystems: Three Caches, Two Sequential Stream Buffers • Interfaces: AHB+ Interface, Mail Box

  35. CalmRISC16 Virtual Memory CalmADM Logical Memory Physical Memory 4M byte Data Memory 4M byte Data Memory Off-chip Memory 000000h 2M byte Calm area DBASE 4:3 data packing 200000h XH XL CalmMAC24 Virtual Memory XBASE Unused XE packed data 4:3 data packing 32K Lword X Data Memory 220000h YH YL Unused YE YBASE packed data 240000h 256K byte SBL0 area S0BASE 280000h 256K byte SBL1 area 32K Lword Y Data Memory 2C0000h Unused Area S1BASE 3F0000h 64K byte I/O Area 3FFFFFh 16bit CalmADM Memory Mapping Scheme

  36. Data Cache Structure • X/Y-Caches • 2-way set associative • Buffered write-back policy • As D-Cache • Calm Area Access • XC/YC are two sets of D-Cache • E bytes are unused • X/Y Area Access • Address translation for E bytes

  37. Why Stream Buffers? • Without Stream Buffers • With Stream Buffers • Eliminate the overhead of cache replacement due to stream I/O • Eliminate cache thrashing due to stream I/O • Separated buffer spaces increase data space

  38. A Sequential Stream Buffer • 16 byte read/write buffer, 16-bit mode / 32-bit mode • Functions for efficient sequential access • Auto-increment of OFFSET address • Empty detection and auto-fill • Full detection and auto-flush • Boundary detection and interrupt generation

  39. De-Interlacing(or IPC) • Scan Rate Conversion in DVDP Source Display Progressive Source (Frame Repetition) Progressive Display (Film) Field Split De-Interlacing (3:2 or 2:2 Pull down) Interlaced Source Interlaced Display (NTSC/PAL)

  40. De-Interlacing-Cont’d • To display an interlaced video signal on a progressive display • Method • Bob • Scan line interpolation/duplication using one field • The resulting vertical resolution is limited to the “field” • Weave • merging of two consecutive fields • The simplest method to implement double resolution • Artifacts in regions of movement • 3D-IPC(Motion Adaptive IPC) • Field merging for still areas of picture and interpolation for areas of movement • Issue: cost function to detect a “movement” • MC-IPC(Motion Compensation IPC) • Accurate motion information • Blocky side effect

  41. De-Interlacing-Cont’d • 3D-IPC in S5H5002 Temporal Filtering Directional Interpolation Field I Image Complexity Field I+1 Spatio-Temporal Filtering Field I-1 Local motion SAD function 3 fields Calculate F(Motion) Global motion Motion inform

  42. WEAVE

  43. 3D-IPC

  44. Other ExamplesVideo Post Processing forImage EnhancementDNIeTM

  45. Detail Contrast Enhancement

  46. Color Tone Enhancement

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