Lecture 5
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Lecture 5. Review of Signal encoding techniques Digital data into digital signals Digital data into analog signals Analog data into digital signals Analog data into analog signal Synchronous and asynchronous communication Error correction and detection. Analog data into analog signal.

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Lecture 5

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Lecture 5

Lecture 5

  • Review of Signal encoding techniques

    • Digital data into digital signals

    • Digital data into analog signals

    • Analog data into digital signals

  • Analog data into analog signal

  • Synchronous and asynchronous communication

  • Error correction and detection

ECS 152A Computer Networks


Analog data into analog signal

Analog data into analog signal

  • Why modulate analog signals?

    • Higher frequency can give more efficient transmission

    • Permits frequency division multiplexing (chapter 8)

  • Types of modulation

    • Amplitude

    • Frequency

    • Phase

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Spectrum of am signal

Spectrum of AM Signal

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Asynchronous and synchronous transmission

Asynchronous and Synchronous Transmission

  • Timing problems require a mechanism to synchronize the transmitter and receiver

  • Two solutions

    • Asynchronous

    • Synchronous

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Asynchronous

Asynchronous

  • Data transmitted on character at a time

    • 5 to 8 bits

  • Timing only needs maintaining within each character

  • Resynchronize with each character

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Asynchronous diagram

Asynchronous (diagram)

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Asynchronous behavior

Asynchronous - Behavior

  • In a steady stream, interval between characters is uniform (length of stop element)

  • In idle state, receiver looks for transition 1 to 0

  • Then samples next seven intervals (char length)

  • Then looks for next 1 to 0 for next char

  • Advantages

    • Simple

    • Cheap

    • Overhead of 2 or 3 bits per char (~20%)

    • Good for data with large gaps (keyboard)

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Synchronous bit level

Synchronous - Bit Level

  • Block of data transmitted without start or stop bits

  • Clocks must be synchronized

  • Can use separate clock line

    • Good over short distances

    • Subject to impairments

  • Embed clock signal in data

    • Manchester encoding

    • Carrier frequency (analog)

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Synchronous block level

Synchronous - Block Level

  • Need to indicate start and end of block

  • Use preamble and postamble

    • e.g. series of SYN (hex 16) characters

    • e.g. block of 11111111 patterns ending in 11111110

  • More efficient (lower overhead) than async

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Synchronous diagram

Synchronous (diagram)

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Types of error

Types of Error

  • An error occurs when a bit is altered between transmission and reception

  • Single bit errors

    • One bit altered

    • Adjacent bits not affected

    • White noise

  • Burst errors

    • Length B

    • Contiguous sequence of B bits in which first last and any number of intermediate bits in error

    • Impulse noise

    • Fading in wireless

    • Effect greater at higher data rates

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Error detection process

Error Detection Process

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Error detection

Error Detection

  • Additional bits added by transmitter for error detection code

  • Parity

    • Value of parity bit is such that character has even (even parity) or odd (odd parity) number of ones

    • Even number of bit errors goes undetected

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Two dimensional parity check codes

1 0 0 1 0 0

0 1 0 0 0 1

1 0 0 1 0 0

1 1 0 1 1 0

1 0 0 1 1 1

Last column consists of check bits for each row

Bottom row consists of check bit for each column

Two dimensional parity check codes

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Figure 3.52


Cyclic redundancy check

Cyclic Redundancy Check

  • For a block of k bits transmitter generates n bit sequence

  • Transmit k+n bits which is exactly divisible by some number

  • Receive divides frame by that number

    • If no remainder, assume no error

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Cyclic redunancy check

Addition:

Multiplication:

= q(x) quotient

x3 + x2 + x

Division:

x3 + x+ 1 ) x6 + x5

x6 + x4 + x3

dividend

divisor

x5 + x4 + x3

x5 + x3 + x2

3

35 ) 122

x4 + x2

105

x4 + x2 + x

17

x

= r(x) remainder

Cyclic Redunancy check

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Figure 3.55


Cyclic redundancy check1

Steps:

1) Multiply i(x) by xn-k(puts zeros in (n-k) low order positions)

2) Divide xn-k i(x) by g(x)

3) Add remainder r(x) to xn-k i(x)

(puts check bits in the n-k low order positions):

Cyclic Redundancy Check

quotient

remainder

xn-ki(x) = g(x) q(x) + r(x)

b(x) = xn-ki(x) + r(x)

transmitted codeword

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Cyclic redundancy check2

Generator polynomial: g(x)= x3 + x + 1

Information: (1,1,0,0) i(x) = x3 + x2

Encoding: x3i(x) = x6 + x5

x3 + x2 + x

1110

x3 + x+ 1 ) x6 + x5

1011 ) 1100000

x6 + x4 + x3

1011

x5 + x4 + x3

1110

1011

x5 + x3 + x2

1010

x4 + x2

1011

x4 + x2 + x

x

010

  • Transmitted codeword:

    • b(x) = x6 + x5 + x

    • b= (1,1,0,0,0,1,0)

Cyclic Redundancy Check

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Distance properties of code

o

o

o

o

x

x

A code with good distance properties

(b)

(a)

A code with poor distance properties

x

o

x

o

x

o

x

x

o

o

o

o

o

o

x

x

o

o

o

o

x

x

x

o

o

o

o

x = codewordso = non-codewords

o

o

x

x

o

Distance properties of code

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Figure 3.51


Error correction

Error Correction

  • Correction of detected errors usually requires data block to be retransmitted Not appropriate for wireless applications

    • Bit error rate is high

      • Lots of retransmissions

    • Propagation delay can be long (satellite) compared with frame transmission time

      • Would result in retransmission of frame in error plus many subsequent frames

  • Need to correct errors on basis of bits received

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Error correction process diagram

Error Correction Process Diagram

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Error correction process

Error Correction Process

  • Each k bit block mapped to an n bit block (n>k)

    • Codeword

    • Forward error correction (FEC) encoder

  • Codeword sent

  • Received bit string similar to transmitted but may contain errors

  • Received code word passed to FEC decoder

    • If no errors, original data block output

    • Some error patterns can be detected and corrected

    • Some error patterns can be detected but not corrected

    • Some (rare) error patterns are not detected

      • Results in incorrect data output from FEC

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Working of error correction

Working of Error Correction

  • Add redundancy to transmitted message

  • Can deduce original in face of certain level of error rate

  • E.g. block error correction code

    • In general, add (n – k ) bits to end of block

      • Gives n bit block (codeword)

      • All of original k bits included in codeword

    • Some FEC map k bit input onto n bit codeword such that original k bits do not appear

  • Again, for math, see chapter 6

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Line configuration

Line Configuration

  • Topology

    • Physical arrangement of stations on medium

    • Point to point

    • Multi point

      • Computer and terminals, local area network

  • Half duplex

    • Only one station may transmit at a time

    • Requires one data path

  • Full duplex

    • Simultaneous transmission and reception between two stations

    • Requires two data paths (or echo canceling)

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Traditional configurations

Traditional Configurations

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Interfacing

Interfacing

  • Data processing devices (or data terminal equipment, DTE) do not (usually) include data transmission facilities

  • Need an interface called data circuit terminating equipment (DCE)

    • e.g. modem, NIC

  • DCE transmits bits on medium

  • DCE communicates data and control info with DTE

    • Done over interchange circuits

    • Clear interface standards required

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Data communications interfacing

Data Communications Interfacing

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Characteristics of interface

Characteristics of Interface

  • Mechanical

    • Connection plugs

  • Electrical

    • Voltage, timing, encoding

  • Functional

    • Data, control, timing, grounding

  • Procedural

    • Sequence of events

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V 24 eia 232 f

V.24/EIA-232-F

  • ITU-T v.24

  • Only specifies functional and procedural

    • References other standards for electrical and mechanical

  • EIA-232-F (USA)

    • RS-232

    • Mechanical ISO 2110

    • Electrical v.28

    • Functional v.24

    • Procedural v.24

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Mechanical specification

Mechanical Specification

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Electrical specification

Electrical Specification

  • Digital signals

  • Values interpreted as data or control, depending on circuit

  • More than -3v is binary 1, more than +3v is binary 0 (NRZ-L)

  • Signal rate < 20kbps

  • Distance <15m

  • For control, more than-3v is off, +3v is on

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Functional specification

Functional Specification

  • Circuits grouped in categories

    • Data

    • Control

    • Timing

    • Ground

  • One circuit in each direction

    • Full duplex

  • Two secondary data circuits

    • Allow halt or flow control in half duplex operation

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Local and remote loopback

Local and Remote Loopback

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Procedural specification

Procedural Specification

  • E.g. Asynchronous private line modem

  • When turned on and ready, modem (DCE) asserts DCE ready

  • When DTE ready to send data, it asserts Request to Send

    • Also inhibits receive mode in half duplex

  • Modem responds when ready by asserting Clear to send

  • DTE sends data

  • When data arrives, local modem asserts Receive Line Signal Detector and delivers data

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Dial up operation 1

Dial Up Operation (1)

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Dial up operation 2

Dial Up Operation (2)

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Dial up operation 3

Dial Up Operation (3)

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Null modem

Null Modem

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Isdn physical interface diagram

ISDN Physical Interface Diagram

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Isdn physical interface

ISDN Physical Interface

  • Connection between terminal equipment (c.f. DTE) and network terminating equipment (c.f. DCE)

  • ISO 8877

  • Cables terminate in matching connectors with 8 contacts

  • Transmit/receive carry both data and control

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Isdn electrical specification

ISDN Electrical Specification

  • Balanced transmission

    • Carried on two lines, e.g. twisted pair

    • Signals as currents down one conductor and up the other

    • Differential signaling

    • Value depends on direction of voltage

    • Tolerates more noise and generates less

    • (Unbalanced, e.g. RS-232 uses single signal line and ground)

    • Data encoding depends on data rate

    • Basic rate 192kbps uses pseudoternary

    • Primary rate uses alternative mark inversion (AMI) and B8ZS or HDB3

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