Design and Implementation of VLSI Systems
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Design and Implementation of VLSI Systems (EN1600) Lecture 32: Pad Frame Design and Packaging PowerPoint PPT Presentation


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Design and Implementation of VLSI Systems (EN1600) Lecture 32: Pad Frame Design and Packaging. Prof. Sherief Reda Division of Engineering, Brown University Spring 2008. [sources: Weste/Addison Wesley – Tanner Manual]. Packaging choices. Traditionally, chip is surrounded by pad frame

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Design and Implementation of VLSI Systems (EN1600) Lecture 32: Pad Frame Design and Packaging

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Design and implementation of vlsi systems en1600 lecture 32 pad frame design and packaging

Design and Implementation of VLSI Systems

(EN1600)

Lecture 32: Pad Frame Design and Packaging

Prof. Sherief Reda

Division of Engineering, Brown University

Spring 2008

[sources: Weste/Addison Wesley – Tanner Manual]


Packaging choices

Packaging choices


Chip to package bonding

Traditionally, chip is surrounded by pad frame

Metal pads on 100 – 200 mm pitch

Gold bond wires attach pads to package

Lead frame distributes signals in package

Metal heat spreader helps with cooling

Chip-to-Package Bonding


Pad frame

Pad frame

So far we looked at core design

This lecture we look at pad frame design


Mosis ami 0 5u tiny chip frame

MOSIS AMI 0.5u Tiny Chip frame

Tanner reserves one of the left pins for VDD and one of right pins for GND


Generic pad layout

Generic pad layout


Esd protection

Static electricity builds up on your body

Shock delivered to a chip can fry thin gates

Must dissipate this energy in protection circuits before it reaches the gates

ESD protection circuits

Current limiting resistor

Diode clamps

Diodes must be large to sustain significant current

Example: Consider charge on human body discharged at a rate (current) = 10 uA for 1us at to a capacitor C=0.025pF → Voltage buildup = 400V destroys the transistor gate

ESD protection


Example 1 padaref offers basic esd protection

Example 1: PADARef offers basic ESD protection

metal 2 distributes VDD

metal 1 distributes signal D

Simplest pad


Example 2 padout

Example 2: PADOUT

Pad has internal buffer


Automatic generation of pad frame in tanner tools

Automatic generation of pad frame in Tanner Tools

  • Add the pad library to your S-Edit design

  • Modify your design to use the pads.

  • Naming convention: if you name nets getting into a pad as PAD_L1 places the pad at the first left location in the pad frame.


Automatic generation of pad frame in tanner tools1

Automatic generation of pad frame in Tanner Tools

3. In L-Edit, change SPR setup to

In padframe setup, Change the layout size to 1.5mm x 1.5mm

Use the new library with the pads and press initialize setup

In padroute setup, make sure you have these design rules


Automatic generation of pad frame in tanner tools2

Automatic generation of pad frame in Tanner Tools

Finally run the place and route and make sure to mark “PadFrame generation” and “Pad route”

You might get a few DRC violations in metal2 that you would need to fix yourself


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