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Exam Review (optional) : Thursday October 18 th , 1-1:50pm in G125

Exam Review (optional) : Thursday October 18 th , 1-1:50pm in G125 Exam Thursday October 25 th 1-1:50pm in DUANE G140 Covers lectures and labs (except microcontrollers)

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Exam Review (optional) : Thursday October 18 th , 1-1:50pm in G125

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  1. Exam Review (optional): Thursday October 18th, 1-1:50pm in G125 Exam Thursday October 25th 1-1:50pm in DUANE G140 Covers lectures and labs (except microcontrollers) You may bring handwritten notes covering one side of one 8-1/2 x 11 piece of paper and a calculator (no textbooks/lab manuals)

  2. Final Projects Written project proposal (25 pts) due on November 6th4pm 1 to 2 pages: explain main idea and approach of project. (You must talk to your lab instructor to get pre-approval.) Progress Report (25pts) due December 4th 4pm. - 1-3 pages describing your progress so far. - Include the circuit diagrams for your project. - describe major problems if any (we may be able to help!) Oral Presentation (75pts) on December 13th, 9 am – 4 pm (There will be a sign-up sheet at the door in G230. Pick a slot!) Computer-based presentation (e.g. PowerPoint etc.) and demonstration of your circuit (show that it works.) Final Project Report (75 pts) due on December 14th, 4 pm.

  3. Types of Projects • List of old projects on website - some of them do not meet the current class requirements if you do not add an analog component • Avoid digital, high-voltage, or mechanical projects. This course is on analog, small signal electronics. • You can work alone or in groups of two. Complexity of the project must be proportional to number of students in the group • Avoid random googling! • You must have a detailed understanding how the circuit works. • You must be able to predict what happens if we modify it • Designing a circuit from scratch vs. a googledcircuit will be considered during grading.

  4. N1 What is the truth table for a NOR gate? B) C) E) D)

  5. N2 The following circuit containing two switches represents which logic gate? NAND AND OR NOR XOR A out +5V B 0V

  6. N3 The following circuit containing two switches represents which logic gate? NAND AND OR NOR XOR A B +5V out 0V

  7. N4 A ● 0 = 0 1 A A

  8. N5 A ● 1 = 0 1 A A

  9. N6 A ● A = 0 1 A A

  10. N7 A ● A = 0 1 A A

  11. N8 A ● (A+B) = 0 1 A B A ● B

  12. What signal do you get at the output ‘Q’ if you set S and R both to 1 (i.e. logic high)? Q = 0 Q = 0.5 Q = 1 State is not defined

  13. N9 Which component would you change to increase the frequency of the square wave by a factor of 2 ? Ra → 2Ra Ra → Ra/2 Rb → 2Rb C → 2C C → C/2

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