1 / 56

COS 250 Discrete Structures

COS 250 Discrete Structures. Assoc. Prof. Svetla Boytcheva Spring semester 2011. Lecture № 10. Boolean Algebra. Boolean Functions Representing Boolean Functions Logic Gates Minimization of Circuits. Boolean Algebra.

cora-bailey
Download Presentation

COS 250 Discrete Structures

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. COS 250Discrete Structures Assoc. Prof. Svetla Boytcheva Spring semester 2011

  2. Lecture № 10 Boolean Algebra

  3. Boolean Functions • Representing Boolean Functions • Logic Gates • Minimization of Circuits

  4. Boolean Algebra The basic rules for simplifying and combining logic gates are called Boolean algebra in honour of George Boole (1815 – 1864) who was a self-educated English mathematician who developed many of the key ideas.

  5. TABLE 1 (11.1)

  6. NOT

  7. AND

  8. OR

  9. FIGURE 1 (11.1) FIGURE 1

  10. TABLE 2 (11.1)

  11. TABLE 3 (11.1)

  12. x f0 f1 f2 f3 0 1 0 0 0 1 1 0 1 1 n=1 - Boolean functions with 1 argument f0(x)= const 0 f1 (x)=xidentity f2 (x)= not xnegation (denotes like  xor) f3 (x)= const 1

  13. x y f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 0 0 0 1 1 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 n=2 - Boolean functions with 2 arguments • f0(x,y)=0; • f1(x,y)=x۸y - conjunction; (denotes like xy) • f3(x,y)=x; • f5(x,y)=y;

  14. x y f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 0 0 0 1 1 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 n=2 f6(x,y)=xy f7(x,y)=x v y - f8 (x,y)=x↓y-Pears f9(x,y)= xy –equivalence (xy or xy )

  15. x y f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 0 0 0 1 1 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 n=2 • f10(x,y)=not y; • f11(x,y)=y →x –reverse implication • f12(x,y)=not x • f13(x,y)=x →y –implication ‏

  16. x y f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 f15 0 0 0 1 1 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 n=2 f14(x,y)=x|y-Sheffer function f15(x,y)=1; f2 and f4not named - presents as

  17. Sheffer stroke In Boolean functions and propositional calculus, the Sheffer stroke, named after Henry M. Sheffer, written "|" or "↑", denotes a logical operation that is equivalent to the negation of the conjunction operation, expressed in ordinary language as "not both". It is also called the alternative denial, since it says in effect that at least one of its operands is false. In Boolean algebra and digital electronics it is known as the NAND operation ("not and").

  18. Peirce arrow Charles Sanders Peirce (September 10, 1839 – April 19, 1914) was an American philosopher, logician, mathematician, and scientist, born in Cambridge, Massachusetts. In 1880 he discovered how Boolean algebra could be done via a repeated sufficient single binary operation (logical NOR) ↓ The Peirce arrow,symbol for "(neither)...nor...", also called the Quine dagger.

  19. TABLE 4 (11.1)

  20. TABLE 5 (11.1) Boolean functions with 1 argument

  21. TABLE 6 (11.1)

  22. TABLE 1 (11.2)

  23. TABLE 2 (11.2)

  24. FIGURE 1 (11.3) FIGURE 1 Basic Types of Gates.

  25. XOR

  26. NAND - NOR

  27. AND, OR and NOT represented byNAND

  28. Integral circuits

  29. Примери

  30. Decoder

  31. Multiplexer

  32. Example

  33. FIGURE 2 (11.3) FIGURE 2 Gates with n Inputs.

  34. FIGURE 3 (11.3) FIGURE 3 Two Ways to Draw the same Circuit.

  35. FIGURE 4 (11.3) FIGURE 4 Circuits that Produce the Outputs Specified in Example.

  36. FIGURE 5 (11.3) FIGURE 5 A Circuit for Majority Voting.

  37. TABLE 1 (11.3)

  38. FIGURE 6 (11.3) FIGURE 6 A Circuit for a Light Controlled by Two Switches.

  39. FIGURE 7 (11.3) FIGURE 7 A Circuit for a Fixture Controlled by Three Switches.

  40. TABLE 2 (11.3) 歐亞書局

  41. TABLE 3 (11.3)

More Related